Cell Processor Uses Rambus High Speed Interface Solutions
February 7, 2005 -- Rambus, Inc. has revealed that the Cell processor incorporates Rambus's XDR memory and FlexIO processor bus interface solutions. Cell is the highly-anticipated advanced microprocessor developed by Sony Corporation, Sony Computer Entertainment, Toshiba Corporation and IBM. The memory and processor bus interfaces designed by Rambus account for 90% of the Cell processor signal pins, providing an aggregate processor I/O bandwidth of approximately 100 gigabytes-per-second.
"The Cell processor demand overwhelming data transfer capability between Cell and main memory system, and Input/Output systems. Rambus, underpinned by its expertise in latest memory technology, provided us with a clear solution that was absolutely the best match to Cell," said Ken Kutaragi, executive deputy president and COO, Sony Corporation, and president and Group CEO, Sony Computer Entertainment Inc.
"We have been busy working with the Sony Group and Toshiba on the development of the Cell processor for the past couple of years and we're excited to see this advanced engineering effort become a reality," said Harold Hughes, chief executive officer at Rambus. "Our engineering teams have not only designed and developed the world's fastest memory and logic interfaces but we continue to help our customers integrate various system components which enable them to bring high-performance, high-value products to the market."
The Rambus XDR memory interface, capable of data rates of 3.2GHz to 8.0GHz, achieves data rate speeds that are an order of magnitude higher than today's mainstream PC memory systems while utilizing fewer DRAMs and fewer controller pins. FlexIO processor buses, formerly codenamed Redwood, are capable of running up to 6.4GHz data rates providing bandwidth more than four times faster than best-of-class processor buses available today. All Rambus high-speed interfaces are developed as complete solutions for high-volume, low-cost systems.
Sony and Toshiba signed a licensing agreement with Rambus in January 2003. Since then the engineering teams have worked closely to design and develop the high-bandwidth interface solutions necessary for next-generation computing and consumer devices.
Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information.