![]() |
Actel Increases MIL-STD-1553 Reliability with New Version of CORE1553BRT IP CoreNovember 2, 2005 -- Actel Corp. has announced Core1553BRT version 3.0, the latest version of Actel's MIL-STD-1553B remote terminal core. Architected to meet the stringent requirements of military and aerospace applications, the Core1553BRT v3.0 intellectual property (IP) core is designed for use with Actel's radiation-tolerant and firm-error immune field programmable gate arrays (FPGAs), and adds an additional level of redundancy by incorporating the use of protected state machines. The Core1553BRT v3.0 also includes an increased level of software and hardware verification, with code coverage now at 100 percent. "As failure is not an option in the military and aerospace industry, Core1553BRT v3.0 provides an answer to customer requests for 'safe' state machines and perfect code coverage," said Ian Land, senior manager, IP solutions at Actel. Actel's Core1553BRT is MIL-STD-1553B compliant and certified to meet all requirements of MIL-HDBK-1553, Appendix A and has the most extensive heritage of any state-machine based MIL-STD-1553 IP. It is a complete 1 Mbits/s dual- redundant remote-terminal that can interface to standard external transceivers and legacy systems, enabling designers to replace existing components and easily reuse current software drivers. The Core1553BRT supports ten message types, including RT-to-RT and broadcast BC-to-RT data transfers, and provides low-power operation from a 12 MHz, 16 MHz, 20 MHZ or 24MHz system clock. Delivering a complete solution, Actel provides everything needed to incorporate a 1553B remote terminal into a system design, including development tools, documentation and software drivers. In addition, Actel offers fully verified MIL-STD-1553 evaluation and development boards that comply with MIL-STD-1553B to help simplify design execution and test. Pricing and AvailabilityThe Core1553BRT v3.0 is available now and is priced at $8,000 for a single-use netlist. | |
Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information. | |