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Overcoming USB Measurement Test-Setup IssuesPublication: EDN Magazine May 13, 2008 -- Measuring the signal quality of USB (Universal Serial Bus) interfaces requires that designers meet the stringent constraints of the USB-IF (USB Implementers Forum) specification. Nothing is more frustrating, however, than attempting to hunt down signal-quality issues in your design when your test setup has introduced curve errors. By isolating setup-testing issues from design-testing issues, designers can ensure that they are making proper measurements of the signal quality of USB-data lines. This accomplishment will lead to uncovering rather than masking design problems. The foundation of measuring USB-signal quality is a violation plot. This plot is the width of a single bit; three boundaries—upper limit, lower limit, and center eye—outline this plot of data, and these boundaries create the violation area and define the area that the signal must not pass through. If the signal enters the violation area, then the design has violated at least one of the USB-specification requirements. The violation area depends on the configuration of the DUT (device under test). For example, a “captive” cable has a different set of limits from a device using a standard B connector. The USB-IF specification contains the plots for each of these tests. Once you have selected the proper test limits for the configuration, you use a test packet to generate each bit over this template. If the signal is monotonic and does not pass through the violation areas, then the signal passes the signal-quality measurement. You must also consider the edge rate of the signal and ensure that the signal does not have too sharp a rise or fall. By Keith Klepin. (Klepin is a senior staff application engineer at Cypress Semiconductor, Inc.) | |
Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information. | |