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How System-Level Trade-Offs Drive Data Converter DecisionsCompany: Synopsys, Inc. For both analog-to–digital converters (ADC) and digital-to-analog converters (DAC), system-level specifications have a strong influence on several aspects of the converter’s design, including conversion rate, resolution, power dissipation and silicon area. With a special emphasis on broadband wireless applications, this white paper reviews the design trade-offs ranging from the converter’s sampling rate to the choice of single- or multiple-chip system partitioning. Understanding these choices enables chip architects and designers to optimize their systems in accordance with their particular constraints and the characteristics of the data converters. Today’s analog intellectual property (IP) choices are extensive, and the available ADCs, DACs, filters and other components offer versatile solutions that suit a wide range of requirements. System architects must make good system-level choices to get the best results from the analog signal-conversion IP - a crucial factor in gaining a competitive edge in any market.
By Manuel Mota, Product Marketing Manager, Synopsys, Inc. | |
Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information. | |