Do We Need an International EDA Roadmap?
Publication: EE Times EDA Designline
September 7, 2010 -- EDA has long been considered as a "soft business" led by a limited number of companies, mostly located in the United States (in the early 1980s) and competing on the basis of functionalities sometimes in a closed environment to sell their incomplete offerings to their customers.
This situation has forced some of their ASIC customers, at that time, to develop internally EDA packages (such as hardware synthesis), a costly and limited solution for a semiconductor company.
Libraries then started to be developed internally, creating large teams of very skilled experts within one single company and at unaffordable costs…but nothing changed at EDA suppliers.
There were few early startups developments, some of them bringing some degree of innovation at the industrial level on a limited area of the design flow around 1975 both in the United States (e.g., Stanford) and in Europe (The Computer Science and Applied Mathematics Institute of Grenoble (IMAG) developed the first electrical simulation tool called IMAG XX).
At this point of time, more complex chips were developed driving the need for more industrial solutions, and EDA tool suppliers in the United States started selling more dedicated tools such as synthesis, place and route operating as "standalone" tools and often from various EDA providers.
Some developments at universities (above-mentioned IMAG simulator) or internally at semiconductor companies were achieved when the design flow was missing these functions.
Industrial solutions started to appear later from the United States (Cadence, Synopsys, Mentor), each company having a dedicated field of expertise with tools operated in standalone mode by ASIC designers. This situation is still mostly true, and companies individually have made significant progress in their fields of expertise through consolidations.
By J. Borel, H.P. Koch, Michel Burle, and A. B. Kahng. (Borel is with JB-R&D Consulting., Koch (and Burle are with CATRENE Technologies, and Kahng is Professor of CSE and ECE, UC San Diego.)
Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information.