A Practical Approach to IP Quality Inspection

Publication: EE Times EDA Designline
Contributor: Atrenta, Inc.

September 26, 2011 -- If you are a chip designer working with third-party IP, you have learned that surprises, not always of the good kind, are an inevitable part of the package. And you are not alone; the use and cost associated with third-party IP are on the rise. So what can you do about it? Do you already have, or plan to have a systematic approach to inspect IP quality on delivery?

Clearly defining what you mean by "quality" can help both you and your supplier converge more quickly on a better flow. Furthermore, your definition of quality probably needs to expand beyond a bug-centric view. A robust process that can automatically assess quality at incoming inspection can have a large impact on your schedule and overall well-being. Instituting such a system may not prevent issues, but it will ensure that issues are trapped quickly, at the source, before they trigger fire-drills later in the design process.

If you are an IP supplier, I'm sure you are already familiar with the concept of "smoke tests" as a quick way to flush out problems in the inner loop of development. This kind of analysis can be used not only to validate correctness but also to give a quick, albeit coarse, assessment of design parameters, as I will explain below. When you are in what-if exploration, this can help you explore more options, more quickly than full implementation analyses would allow.

By Bernard Murphy, Ph.D. (Murphy is the Chief Technology Officer of Atrenta Inc.)


Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information.
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