Calypto Delivers Bus Interface Libraries to Easily Connect High Level Synthesis Models to ARM Platform


February 27, 2012 -- Calypto Design Systems, Inc. today announced bus interface libraries that connect hardware subsystems implemented with Calypto's high-level-synthesis product (HLS), Catapult Synthesis, with AMBA AXI bus interfaces. The libraries include master and slave interfaces with both TLM and HLS views, which allows easy interplay between a TLM 2.0 platform and HLS implementation flow without degrading simulation performance or hardware quality. The highly parameterizable AXI interface supports a wide range of configurations including burst modes, bus width and auxiliary control signals.

"The AXI interfaces are the first in a series of libraries in development at Calypto that will make Catapult C more readily available to mainstream designers," said Shawn McCloud, Vice President of Marketing at Calypto. "They are written entirely in SystemC and tuned through the Catapult C synthesis tool. These interfaces are a great example of the benefits of mixing cycle-accurate SystemC for control with abstract SystemC/C++ to implement a hardware subsystem."

The AXI interface library is tuned so the resulting hardware is optimized for the user's specific performance requirements, configuration mode and target technology.

Availability

Available in April.


Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information.
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