On-Chip ESD Protection in Complex Analog/Mixed-Signal and High-Voltage Designs
Sponsor: X-FAB Semiconductor Foundries AG
March 7, 2012 -- Electrostatic discharge (ESD) is a serious threat to integrated circuits (ICs) that can cause irreversible damage. Join X-FAB for a free webinar on ESD protection to learn how to eliminate ESD threats in complex analog/mixed-signal and high-voltage designs. This webinar presents an overview of various ESD protection concepts, and explains the structures and schemes available to protect against electrostatic discharge in X-FAB's enhanced 0.35- and 0.18-Ám XH035 and XH018 high-voltage foundry processes. It examines behavior, layout and application requirements. It also highlights similarities and differences among ESD protection concepts, outlining the advantages and disadvantages of each in circuit designs.
Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information.