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Resistive RAM: The Future Embedded Non-Volatile Memory?Contributor: Kilopass Technology, Inc. April 9, 2012 -- The major drawback to existing embedded reprogrammable non-volatile memory (NVM) solutions, such as EEPROM and Flash, is they add costly processing steps to the standard logic CMOS flow and becomes increasingly incompatible with advanced logic processes. In recent years, there have been several emerging non-volatile memory technologies under extensive research and development. They include phase-change random access memory (PCRAM), spin-transfer torque magnetic RAM (STT-MRAM), ferroelectric RAM (FRAM), and resistive RAM (RRAM or ReRAM). Among them for embedded applications, RRAM promises some significant advantages in CMOS compatibility, cell-structure simplicity, excellent scalability, low power consumption and fast operation speed. The basic resistance-switching memory cell in RRAM consists of an insulating or semiconducting material sandwiched between two highly conductive electrodes like a MIM (metal-insulator-metal) structure. By applying a proper voltage to one of the electrodes, the cell can be switched between a high-resistance state (HRS) and a low-resistance state (LRS), reversibly from SET and RESET operations. Depending on the switching and electrode materials, SET and RESET voltages can be of the same polarity (unipolar) or the opposite polarity (bipolar). Unipolar and bipolar switching are not always mutually exclusive though. To date, the resistive switching property has been observed in most of the transition metal oxide materials including both binary oxide and perovskite, such as TiOx, VOx, NiOx, CuOx, ZnOx, ZrOx, HfOx, TaOx, WOx, and SrTiOx. Even the prevalent SiOx can be set and reset into substantially different resistance states. It is this readily available material in standard CMOS fabs that makes RRAM particularly attractive for embedded NVM applications. Various resistive switching mechanisms have been proposed to explain and model RRAM set and reset operations. They include the formation and rupture of conductive filaments (CFs), space-charge-limited conduction, charge trapping, electrode-limited conduction, and Pool-Frenkel emission. Although the underlying physical mechanisms are often material-specific and still controversial, the formation and rapture of nanoscale CFs applies to a large majority of binary oxide unipolar or bipolar RRAMs. The initial formation of CFs is by a high-voltage electroforming process where a localized link rich in oxygen vacancies or metal atoms is formed, similar to dielectric soft-breakdown. Electroforming is not needed if the switching materials have inherent defective links (grain boundaries, etc.) or oxygen vacancy reservoirs or if a reactive electrode is used. The reset and set processes breakdown and re-grow the conductive filaments involving oxidation and reduction (Redox). For unipolar switching, joule heating is almost always required for oxygen ion diffusion and re-oxidation. While existing embedded reprogrammable memory technologies prove to be difficult or expensive to manufacture beyond the 40-nm process node, RRAM shows excellent scalability with shrinking design rules. This translates into greater density and, ultimately, lower cost per die. RRAM also consumes less power than existing mainstream memories. Excellent cell level endurance of >1012 cycles has been reported. Fast read/ write capability of a few nano-seconds is sufficient for execute in place applications, thus providing the potential to replace embedded SRAM. In its simplified form, RRAM provides a promising alternative to EEPROM and Flash in embedded applications especially at process geometries of 28nm and below. Recent explosive research and development work across industry and academy should yield accelerated solutions to remaining issues and challenges such as switching physics, material uniformity control, and yield and reliability improvement.
By Harry Luan. Harry Luan is Chief Technology Officer at Kilopass Technology, Inc. This article originally appeared in Kilopass Technology, Inc.'s Memory Pill Newsletter. | |
Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information. | |
