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Aldec Invited to Present "FPGA Level In-Target Testing for DO-254 Compliance" at Avionics Conference in South KoreaJuly 2, 2012 -- Aldec, Inc. joins Korean Air, Korean Aerospace Industries, Thales, Rockwell Collins, and other top-tier exhibitors and presenters at the Avionics System Symposium (ASSK 2012) in KyungJu, South Korea. The Symposium, serving the Aerospace Electronics Technology industry, runs July 5-6, 2012, and will showcase leading research in the form of technical papers and presentations. Aldec, recently receiving global recognition for supporting several avionics projects in achieving DO-254 compliance, has been invited to take part in the conference where Louie De Luna, Aldec DO-254 Program Manager, will present "FPGA Level In-Target Testing for DO-254 Compliance." FPGA-level in-target testing with DO-254/CTS provides a feasible means to increase target FPGA verification coverage by test, satisfying the verification objectives of the DO-254/ED-80 specification. It allows reuse of the simulation testbench as test vectors for at-speed testing to ensure that the device testing meets the requirements and performs as to what the RTL implementation intended. About DO-254/CTSDO-254/CTS consists of a fully customized hardware and software package that facilitates target device testing early in the process without the final target board. It enables a single and automated environment to test all FPGA level requirements at-speed in the target device with full visibility and controllability at the FPGA pin level. Posted by: John Miklosz | |
Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information. | |