Xylon Announces logiI2C Master Controller IP Core for Xilinx FPGAs

July 9, 2012 -- The new logiI2C Bus Master Controller IP core from the Xylon logicBRICKS IP library supports single-master I2C communications and enables bug-free data transfers. It is ARM AMBA AXI4-Lite bus-compliant, and can be implemented in all Xilinx, Inc. programmable devices, including the 7 series FPGA families and the Zynq-7000 EPP.

Xylon delivers the logiI2C IP core in a format which is fully compatible with Xilinx Platform Studio (XPS), and the software driver compatible for use within Xilinx Software Development Kit (SDK).

Availability and Pricing

The IP core is available now. License fees offered through Xylon's Low-Volume IP Program (LVIP) start at under $1,050.

Posted by: John Miklosz

Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information.
Copyright 2002 - 2011 Tech Pro Communications, 1209 Colts Circle, Lawrenceville, NJ 08648