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Intilop Announces Its Customizable 3rd-Generation 10G Ultra-Low Latency, High-Performance Ethernet MAC  
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April 9, 2012 -- Intilop, Inc. has announced its new 3rd Gen 10G ultra-low-latency Ethernet Media Access Controller (EMAC) IP cores. These ultra-low-latency 10G EMAC IP products have fully integrated scalable DRAMs and optional PCIe/DMA Engines. These EMAC IP's can also be combined inside a system to provide ultra-high-performance NIC functionality.

According to Intilop, this is the first time the latency barrier of 20ns has been shattered, while offering highly scalable ultra-low latency and high performance. These EMACs also offer Ethernet throughput of 100% for large and small payload sizes on a 10G network. This was accomplished with custom hand-crafted hardware design that implements a patent-pending architecture.

This MAC architecture and design has been deployed in several world-class high-performance systems with Intilop's ultra-low-latency TCP and UDP IPs and solutions, including NASDAQ and NY Stock exchange and other world-class equipment. These customizable EMACs are especially designed for the financial, data-storage, high-performance-computing (HPC), cloud-computing and high-end network equipment OEM markets.

Intilop's product-line solutions are available in flexible FPGA/ ASIC/ SOC technologies which can easily accommodate diverse HPC appliance maker's technical design specifications.

Go to the Intilop, Inc. website to find additional information.

E-mail Intilop, Inc. for more information.

Read more about
Intilop, Inc.
on SOCcentral.com


Keywords: ASICs, ASIC design, FPGAs, field programmable gate arrays, FPGA design, IP, intellectual property, cores, Ethernet MAC, Intilop
601/38228 4/9/2012 465 67


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