| Atrenta Offers IP Kit Spring-Cleaning Promotion | | |
April 16, 2012 -- Atrenta, Inc. is offering semiconductor design groups access to the Atrenta IP Kit through a free 2-week trial promotion. From April 16, 2012 to May 31, 2012, qualified design groups in the US will be able to use the Atrenta IP Kit to perform "spring cleaning" on their third-party or internally developed IP blocks for two consecutive weeks at no cost.Atrenta's IP Kit is also used by TSMC to quality soft IP for inclusion in the TSMC 9000 IP library.
Atrenta's IP Kit helps SOC designers to confront IP re-use challenges, such as design completeness, power consumption, testability, subtle integration risks, managing updates/ bug fixes and even finding the right IP. The Atrenta IP Kit offers the following user benefits:
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IP quality metrics with easy-to-read HTML-based DashBoard and DataSheet reports.
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Automated SpyGlass setup.
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Comprehensive hand-off checks for simulation-synthesis mismatch, electrical, clock domain crossing verification, testability analysis (stuck-at & at-speed), power estimation and verification of timing constraints.
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IP packaging support.
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Ease of integration into existing design flows.
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Go to the Atrenta, Inc. website for details.
| E-mail Atrenta, Inc. for more information.
Read more about
Atrenta, Inc.
on SOCcentral.com |
| Keywords: ASICs, ASIC design, EDA, EDA tools, electronic design automation, IP, intellectual property, cores, Atrenta, SpyGlass,
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