May 8, 2012 -- MoSys, Inc. today announced the production release of its first-generation high-speed serial access Bandwidth Engine IC product. The MSR576 device is optimized for high-data rate, high-access rate use in networking, video-processing and compute-acceleration applications and is supported by leading suppliers of FPGAs and ASICs. According to MoSys, the architecture provides over two Giga-accesses per second (GAps), more than double the performance of any competing solution, and provides greater than 2.5X improvement in power, system cost and board area.

Working with packet-processing solutions implemented using ASICs, network processors or FPGAs, ICs are optimized for fast, intelligent access to accelerate the processing of packet header information supporting high-data rate traffic in networking and communications systems. The device is well suited to traffic management, classification, network services, intrusion detection and prevention, as well as video-processing applications. Bandwidth Engine enables equipment manufacturers to deliver line card solutions, combining multi-100 Gbps capacity with significant numbers of data accesses to meet increased traffic demand, quality-of-service and expanded features.

"The rapid expansion in the number of users, bandwidth per user and new services translates to increased demand for systems that can sustain packet rates of over 150 million packets per second with dozens of data accesses per packet," stated John Monson, Vice President of Marketing for MoSys. "Bandwidth Engine addresses critical memory-bandwidth and access-rate bottlenecks that limit the processing, monitoring, and management of network traffic, while enabling support for increased data rates and added intelligence with reduced board space and lower power."

This first-generation Bandwidth Engine device is built with 576Mbits of MoSys' patented high-performance, high-density 1T-SRAM memory and contains onboard algorithmic logic units that provide up to 2.7GAps and up to 1 Giga-operations per second for the acceleration of common functions in 100GE applications. The device supports peak data rates of 198Gbps when utilizing 16 lanes of 10.3125-Gbps, CEI-11G and XFI compatible SerDes interface.

Bandwidth Engine supports the necessary data reliability and integrity required by carrier and enterprise applications through the use of a 72-bit access word which can be protected with standard error-correction codes. Bandwidth Engine enables full-duplex and concurrent operations with the packetized, 90% efficient GigaChip Interface transport protocol. The GigaChip Interface is protected from errors using CRC codes and includes an automatic-error-recovery mechanism to ensure robust and reliable data transport.

MoSys' Bandwidth Engine IC has been fully qualified for carrier-class applications and is available for volume production now.