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Monday, May 20, 2013

Dolphin Integration Announces Break-Through in Logic Design Improving Performance

June 13, 2012 -- Dolphin Integration will release LogiWare, the latest development for standard cell libraries at TSMC Symposium, in Amsterdam, on June 19, 2012.

Today's logic blocks tend to be comprised of at least 40% of sequential logic synthesized from an RTL description with flip-flops and latches. The first challenge addressed by Dolphin was to revisit its Complex Cell Set Libraries (CCSL) thanks to the improvements brought by the RCSL concept: Reduced Cell Stem Libraries. The next challenge raised by the integration of these thousands of registers, was in optimizing and structuring such widespread loose pieces as scattered registers, register files and register banks. This was achieved through LogiWare.

LogiWare is built on two innovations:

A library of synthesizable models (RTL in verilog-HDL) configured for multiple asynchronous-read ports and offered together with the patented Dolphin's SESAME ultra-high-density standard-cell library. Not only is the density of synthesized registers improved by 10% to 20% depending on technological processes, but the readability of the design makes debugging easier.
The CARME generator provides the instances for compacting the design when replacing these standard-cell-based registers. As CARME instances are track-compatible and share the same behavior as synthesized registers, they enables the seamless replacement of synthesized registers by bit-cell-based registers. Such registers improve speed significantly -- depending on the design -- and increase density at least twice compared to synthesized registers.

LogiWare reverses the traditional approach of synthesized registers to enable users to benefit from:

A freedom-of-implementation choice, as designers can start using synthesizable models and later decide to switch for hard macros called from CARME generator.
An increased flexibility, as both synthesizable models and CARME generator are configurable for multiple read ports. Also, portability is possible to many process flavors and foundries as CARME generator is designed with a proprietary bit-cell.
An optimization of designs, for those who want to improve speed but also even further the logic density, LogiWare promises the freedom of synthesizable registers with the optimization of performances from a custom memory design. What is more, CARME features the capability to operate down to 0.81V at 65-nm LP process.
A structured RTL design, as LogiWare enables to structure registers as "packs" to facilitate RTL engineering.

Availability

LogiWare will first be released for the 65-nm technological process.

Go to the Dolphin Integration website to find additional information.

E-mail Dolphin Integration for more information.

Read more about
Dolphin Integration
on SOCcentral.com

Keywords: ASICs, ASIC design, EDA, EDA tools, electronic design automation, IP, intellectual property, cores, standard cells, Dolphin Integration, LogicWare,

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