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ATopTech Selects Berkeley Design Automation Analog FastSpice to Enhance Aprisa Place-and-Route  
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July 10, 2012 -- Berkeley Design Automation, Inc. today announced that ATopTech, Inc. has selected the company's Analog FastSpice (AFS) Platform to enhance the accuracy of the timing analysis in the Aprisa place-and-route product for designs at advanced process technology nodes, such as 28nm and 20nm.

"Aprisa's timing-driven place and route technology is constantly calibrated for Spice-level accuracy at advanced technology nodes," said Jue-Hsien Chern, CEO at ATopTech. "We selected the Analog FastSpice Platform for the calibration of Aprisa's timing-driven place-and-route technology for 28nm and 20nm because it delivers nanometer Spice accuracy more than 5 times faster than traditional Spice and has the capacity required for large post-layout calibration runs."

"Accurate timing closure and sign-off is critical to IC designers and ATopTech's selection highlights the accuracy, performance, and capacity benefits of the AFS Platform," said Ravi Subramanian, President and CEO of Berkeley Design Automation.



Go to the Berkeley Design Automation, Inc. website for details.

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Keywords: ASICs, ASIC design, EDA, EDA tools, electronic design automation, place and route, place-and-route, placement and routing, Spice, Spice-like, ATopTech, Berkeley Design Automation, Analog FastSpice
601/38822 7/10/2012 284 59


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