| China's CSIP Joins OCP-IP |
May 25, 2005 -- Open Core Protocol International Partnership (OCP-IP) announces that the Software and Integrated Circuit Promotion Center (CSIP) has joined the organization. CSIP is a public service organization guided and supported by the Chine ... read more |
| ChipMaestro Extends SoC Design and Verification Expertise to Computer Peripherals and Communications Markets |
May 25, 2005 -- eInfochips, Ltd. today introduced ChipMaestro, a portfolio of domain expertise, IP and services to support ASIC development in the consumer electronics, communications and computer peripherals markets. eInfochips has brought toge ... read more |
| Cadence, IBM, Chartered Continue Collaboration to Enable 90-Nanometer Designs |
May 25, 2005 -- Cadence Design Systems, Inc. has announced the next steps of its ongoing collaboration with IBM and Chartered Semiconductor Manufacturing to provide advanced solutions to enable system-on-chip (SoC) designs at 90nm. The three com ... read more |
| Berkeley Design Automation Announces PLL Noise Analysis Tool for High-Performance Analog/RF ICs |
May 25, 2005 -- Berkeley Design Automation, Inc., a new analog/RF electronic design automation company, has announced its initial product, PLL Noise Analyzer, a noise analysis tool for high-performance analog/RF integrated circuits containing ph ... read more |
| ARC International and Sonic Network Announce Embedded Audio Synthesis for the ARCsound Audio Subsystem |
May 25, 2005 -- ARC International and Sonic Network, Inc., a provider of audio synthesis technology to the handheld consumer device and musical instrument markets, have announced that Sonic’s Embedded Audio Synthesis (EAS) technology is now avai ... read more |
| FlexASIC Gets Magma Blast Create SA Support to Enhance Performance and Design Flexibility |
May 25, 2005 -- eASIC Corp., Magma Design Automation, Inc., and Flextronics Semiconductor have announced the availability of the complete Easy eFlow tools suite, incorporating the Blast Create SA tool for the FlexASIC product family. The three c ... read more |
| Alliance Launched to Develop the Next Generation of Supercomputers |
May 25, 2005 -- The FHPCA (FPGA High Performance Computing Alliance) was launched today in Edinburgh. The group comprises leading technology companies, academics and the public sector who will work together over the next two years to design and ... read more |
| SMIC ARM926EJ Processor Chip Successfully Validated |
May 25, 2005 -- The Semiconductor Manufacturing International Corp. (SMIC) announced that its 0.13-micron chip using the ARM926EJ microprocessor core and the associated Embedded Trace Macrocell (ETM9) on-chip debug peripheral have been successf ... read more |
| Synopsys Provides Low-Power Reference Flow for IBM-Chartered 90-Nanometer Process Platform |
May 25, 2005 -- Synopsys, Inc. is collaborating with IBM and Chartered Semiconductor Manufacturing to offer a low-power reference flow for the 90nm common process platform. The Galaxy Design and Discovery Verification platforms are the foundatio ... read more |
| Sanyo Selects Mentor Graphics Catapult C Synthesis for Next-Generation Multimedia LSI Design |
May 25, 2005 -- Mentor Graphics Corp. today announced that Sanyo Electric Co., Ltd. has selected the Mentor Graphics' Catapult C Synthesis tool after an evaluation comparing leading high-level synthesis tools. Sanyo chose the Catapult C Synthesi ... read more |
| New Cadence PowerMeter Technology Enables Signoff-Quality Dynamic Power Rail Verification |
May 25, 2005 -- Cadence Design Systems, Inc. has introduced new PowerMeter functionality that extends its dynamic power rail analysis solution with signoff-quality power calculation. Using dynamic power calculation algorithms, PowerMeter lets de ... read more |
| Xilinx Improves Performance and Productivity for Virtex-4 Platform FPGA Designs with PlanAhead 7.1 Tool |
May 25, 2005 -- Xilinx, Inc. has announced the immediate availability of its next generation PlanAhead 7.1 FPGA design and analysis tool. The tool enables designers to boost logic performance by 15%, and in some cases boost performance by 2X, fo ... read more |
| Jasper Design Automation Delivers 100% Actual Coverage for ABV Users |
May 25, 2005 -- Jasper Design Automation has announced JasperGold 4.0, a major new release of the company's formal verification solution. Also introduced today was JasperGold Express, a new push-button version of JasperGold for assertion-based v ... read more |
| SSIPEX Becomes OCP-IP Member and Helps Launch Chinese Language Website |
May 25, 2005 -- The OCP-IP today announced that the Shanghai Silicon Intellectual Property Exchange (SSIPEX) has become a member of the Organization. The Group also announced the launch of a simplified Chinese language website. This new version ... read more |
| GiDEL Ships PROCSpark II Development Board Featuring Altera's Low-Cost FPGAs |
May 25, 2005 -- Altera Corp. and GiDEL, Ltd. have announced the immediate availability of the PROCSpark II development platform featuring Altera's low-cost Cyclone II FPGAs. Designed for FPGA-based reconfigurable computing, the PROCSpark II syst ... read more |
| Nallatech Helps Forge Alliance to Advance FPGA-Based High-Performance Computing |
May 25, 2005 -- Nallatech, Ltd. as joined forces with several partners from industry, academia and government organizations in launching the FPGA High Performance Computing Alliance (FHPCA) at an industry conference held in the Dynamic Earth Cen ... read more |
| Magma Develops Low-Power Reference Flow for IBM-Chartered 90-Nanometer Process Platform |
May 25, 2005 -- Magma Design Automation, Inc. is collaborating with IBM and Chartered Semiconductor Manufacturing to offer an RTL-to-GDSII reference flow for low-power designs targeting the IBM-Chartered 90nm low-power common process platform. T ... read more |
| LSI Logic Eliminates Mask Charges for Entry Level Platform ASIC Solutions |
May 25,2005 -- LSI Logic Corp. has added two new slices to its RapidChip Integrator2 Platform ASIC family that provide both ASIC and FPGA designers with a low-risk, low-cost option for high-volume applications. With zero mask charges, non-recurr ... read more |
| Interra Systems Facilitates Successful Deployment of Focus |
May 25, 2005 -- Interra Systems has integrated its Verilog Cheetah and VHDL Jaguar analyzers into the Focus product line offered by FishTail Design Automation. Integration of Interra's language analyzers let FishTail offer proven Verilog, VHDL a ... read more |
| Legend's MSIM Circuit Simulator Integrated with Silicon Canvas's Laker-ADP |
May 25, 2005 -- Legend Design Technology, Inc. today announced that Silicon Canvas, Inc. has successfully integrated MSIM circuit simulator into its Laker-ADP (Analog Design Platform) design flow. MSIM circuit simulator has been well proven by i ... read more |
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