| 170 MHz FIFOs Using the Virtex Block SelectRAM+ Feature |
| Source: Xilinx, Inc. |
The Virtex FPGA series provides dedicated on-chip blocks of 4096 bit dual-port synchronous RAM, which are ideal for use in FIFO applications. This application note describes a way to create a common-clock (synchronous) version and an independent-clock ... read more |
| 200MHz UART with Internal 16-Byte Buffer |
| Source: Xilinx, Inc. |
This application note describes highly optimized UART transmitter and receiver macros for Xilinx Virtex, Virtex-E, and Spartan-II devices. The UART_TX and UART_RX macros not only communicate with each other, but they are also fully compatible with the ... read more |
| 644-MHz SDR LVDS Transmitter/Receiver |
| Source: Xilinx, Inc. |
This application note describes single data rate (SDR) transmitter and receiver interfaces operating at up to 644 MHz, using 17 Low-Voltage Differential Signaling (LVDS) pairs (one clock and 16 data channels), implemented in a Virtex-II FPGA. The accom ... read more |
| A Flexible Architecture to Drive Sharp Two-Way Viewing Angle and Standard LCDs |
| Source: Altera Corp. |
|
One of the most common elements in today's consumer and automotive
electronics is the liquid crystal display (LCD). LCD technology has produced a
large array of products that meet a wide range of size, power, and image quality
requirements. Rec ... read more |
| Achieving Low Power in 65-nm Cyclone III FPGAs |
| Source: Altera Corp. |
Traditionally, increased features and greater performance have dominated the expectations for next-generation FPGAs. However, designers must often integrate these new features and greater performance within the same (or often smaller) space and power c ... read more |
| An Overview of Multiple CAM Designs in Virtex Devices |
| Source: Xilinx, Inc. |
Flexible CAMs (Content Addressable Memory) are implemented in Virtex family devices by taking advantage of the reprogrammability of the basic LUT as a Shift Register (SRL16) or as a SelectRAM+ memory and the fast carry logic chain. Although CAMs are al ... read more |
| Analog Devices TigerSHARC Link |
| Source: Xilinx, Inc. |
A full-featured transmitter/receiver macro using the Analog Devices ADSP-TS101S TigerSHARC link-port function is descibed in this application note and reference design. The product families covered by this application note include the Spartan-II, Spart ... read more |
| Broadcast Video Infrastructure Implementation Using FPGAs |
| Source: Altera Corp. |
The proliferation of high-definition television (HDTV) video content creation and the method of delivering these contents in a bandwidth-limited broadcast channel environment have driven new video compression standards and associated video image proces ... read more |
| CAM in ATM applications |
| Source: Xilinx, Inc. |
Content Addressable Memory (CAM) or associative memory, is a storage device, which can be addressed by its own contents. Each bit of CAM storage includes comparison logic. A data value input to the CAM is simultaneously compared with all the stored dat ... read more |
| Color Space Converter |
| Source: Xilinx, Inc. |
This application note describes three ways to implement the YCrCb Color Space to RGB Color Space conversion necessary in many video designs. The first implementation shows how one might simply write Behavioral Verilog to describe the conversion equatio ... read more |
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