| MP3 Player |
| Source: Xilinx, Inc. |
MP3 is a digital compression technique based on MPEG Layer 3 which stores music in a lot less space than current CD technology. Software is readily available to create MP3 files from an existing CD, and the user can then download these files into a por ... read more |
| Multi-Channel 622 Mb/s LVDS Data Transfer |
| Source: Xilinx, Inc. |
Virtex-E devices provide dedicated on-chip differential receivers between adjacent user I/O pins, which are ideal for receiving LVDS signals at speeds of up to 622 Mb/s in the -7 speed grade. This application note describes how to design a high-speed, ... read more |
| Multi-Drop LVDS with Virtex-E FPGAs |
| Source: Xilinx, Inc. |
This application note describes how to use LVDS signaling for high-performance multi-drop applications with Virtex-E FPGAs. Multi-drop LVDS allows many receivers to be driven by one Virtex-E LVDS driver. Simulation results indicate that the reference d ... read more |
| NAND Flash Memory Interface |
| Source: Xilinx, Inc. |
This application note describes the use of a Xilinx CoolRunner XPLA3 complex PLD (CPLD) to implement a NAND Flash memory interface. CoolRunner CPLDs are the lowest power CPLD available and the ideal target device for memory interface applications.
... read more |
| PN Generators Using the SRL Macro |
| Source: Xilinx, Inc. |
Pseudo-random Noise (PN) generators are at the heart of every spread spectrum system. Many PN generators are required within Code Division Multiple Access (CDMA) base stations. PN generators are used to implement synchronization and uniquely code indiv ... read more |
| Power Distribution System (PDS) Design - Using byPass/Decoupling Capacitors (XAPP623)
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| Source: Xilinx, Inc. |
This application note covers the principles of power distribution systems and bypass or decoupling capacitors. A step-by-step process is described where a power distribution system can be designed and verified. The final section discusses additional so ... read more |
| PowerPC 60X Bus Interface to a Virtex-E Device |
| Source: Xilinx, Inc. |
This application note describes a reference design using a PowerPC 60X bus interface with interfaces to Synchronous Static RAM (SSRAM) and flash memory. The design supports twoPowerPC 60X bus microprocessors (PowerPC 750 and 750CX) and implements a pip ... read more |
| Predicting the Power Dissipation of Actel FPGAs |
| Source: Actel Corp. |
Calculating the power dissipation of field programmable gate arrays (FPGAs) is similar to using the calculations for other CMOS ASIC devices, such as gate arrays and standard cells. The power dissipation depends on such factors as utilization, average ... read more |
| Quad DataRate SRAM Interface for Virtex-II Devices |
| Source: Xilinx, Inc. |
Quad Data Rate (QDR) Synchronous Static RAM (SRAM) is one of the highest bandwidth solutions available for networking and telecommunications applications. This low-cost, high-performance solution is ideal for applications requiring memory buffering, tr ... read more |
| Quad-Port Memories in Virtex Devices |
| Source: Xilinx, Inc. |
This application note describes how the existing dual-port block memories in the Spartan-II and Virtex families can be used as Quad-Port memories. This essentially involves a data access time (halved) versus functionality (doubled) trade-off. The overa ... read more |
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