JTAG/ boundary scan is the most ingenious test technology. It is the jump from physical access to a board's conductor tracks (necessary for the in-circuit test) with all its physical limitations to an electric and, therewith, unlimited access. JTAG/ boundary scan only requires four control lines and only a fistful of important "design-for-testability" rules.
When talking about JTAG or boundary scan, one refers to the IEEE Std. 1149.1 — thus the static, digital interconnection test. Its limitations are to be found in the analog area as well as high-speed area. But brand-new approaches and solutions referring to the standards IEEE 1149.4 and 11149.6 have extended the utilization of JTAG/ boundary scan in these areas. A boundary scan test developer doesn't have to deal with each and every detail of the technology because modern tools, based on component models, execute the greater part of his tasks.