This paper describes a new methodology for simultaneous
switching noise (SSN) simulations by using a system level
signal integrity (SI) analysis software, which is combinations
of a quick full wave electromagnetic field solver for multiplelayer
structure based on FDTD (Finite Difference Time
Domain) and a circuit solver. The solution is based on the
geometry, material, stack-up structure, and basic circuit
imformation. The simultaneous switching noise issue is
studied for two types of chipset packages - OLGA (Organic
Land Grid Array) and WBGA (Wirebond Ball Grid Array) -
with 40 drivers switching simultaneously.
Different simulation conditions, such as with or without
on-die interconnection model, different on-die decoupling
capacitor values, are imposed during the simulations.
Simultaenous switching noise (SSN) effects such as skew,
signal overshoort, ring back, and power-ground voltage
fluctuations, are obtained and compared. These data can be
used for a design guideline specification or for package
performance improvement purposes. It is believed that all
these studies are very informative to chip and package analysis
and design for high-speed system applications.