Page loading . . .

  
 Category: Vendors, Organizations & Universities: Vendors: Tuesday, May 21, 2013
drawElements  
Address: Mikonkatu 19 B 9
              Helsinki FI-00100 FINLAND
Phone: 358 400 15 5951
Email: info@drawelements.com
Website: www.drawelements.com


drawElements is a software expert company focusing on computer graphics technologies for the embedded space. Its main product is the drawElements Quality Program, a benchmarking system for measuring the quality of GPUs and their drivers. It has also been working on related technologies such as run-time optimized blitters, OpenGL ES 2.0 drivers, shader compilers, and software rasterizers.

News

drawElements Introduces dEQP Score for Comparing Real-World GPU Quality

3/5/2012


Go directly to drawElements for more company and product information.

Keywords: drawElements, EDA, software,
206/38018 3/2/2012 115 12
Rate this vendor's website (anonymous postings will be deleted)




Designer's Mall
0.453125



 Search site for:
    Search Options

Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Exec Viewpoint

Maximizing the Value of Your Internal IP


Warren Savage
CEO, IPextreme

Exec Viewpoint

Yes, Virginia,
There Is a
Stitch-and-Ship


Dave Johnson
VP of Sales
Breker Verification

Odd Parity

Lets' Go On
with the Show!


Mike Donlin
The Write Solution

Odd Parity Archive

Barbara's Bytes

So, Just What
Is ESL


Barbara Tuck
Senior Editor,
SOCcentral

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
CPLD Design
PCB Design
DSP Design
RTOS Development
Digital Design

Analog Design
Mixed-Signal Design
DFT
DFM
IC Packaging
VHDL
Verilog
SystemC
SystemVerilog

Special Topics/Feature Articles
3D Integrated Circuits
Analog & Mixed-Signal Design
Design for Manufacturing
Design for Test
DSP in ASICs & FPGAs
ESL Design
Floorplanning & Layout
Formal Verification/OVM/UVM/VMM
Logic & Physical Synthesis
Low-Power Design
MEMS
On-Chip Interconnect
Selecting & Integrating IP
Signal Integrity
SystemC
SystemVerilog
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Verilog
VHDL
 
Design Center
Whitepapers & App Notes
Live and Archived Webcasts
Newsletters


About SOCcentral.com

Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About SOCcentral.com
Copyright 2003-2013  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
190.206  0.53125