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 Category: Vendors, Organizations & Universities: Vendors: Friday, May 24, 2013
Real Intent, Inc.  
Address: 3910 Freedom Circle, Suite 102A
              Santa Clara, CA 95054 USA
Phone: 408-982-5444
Email: info@realintent.com
Website: www.realintent.com


Real Intent is a provider of assertion-driven formal verification systems. Verix, Real Intent's assertion-driven formal verification system, can be used in an automatic Implied Intent mode or a user-driven Expressed Intent (user assertions) mode. Verix' scalable hierarchical formal methodology is an industry first. SimLink, another Verix feature, tightens the links between its formal functional methodology and simulation. Verix Clock Intent Verification, uses the power of formal verification to perform exhaustive clock domain analysis.

SOCcentral Feature Articles

Clock Domain Crossing Demystified

1/3/2013

Blindsided by a Glitch

11/19/2012

Advanced Sign-Off…It's Trending!

9/13/2011

Is Your CDC Tool of Sign-Off Quality?

5/13/2011

Mind the Design and Verification Gap

2/16/2011

Is CDC (Clock Domain Crossing) Analysis a Misnomer?

1/10/2011

Verification Challenges Require Surgical Precision

8/16/2010

Imagining Verification Success

6/2/2010

Articles Online

Building an RTL Sign-off Flow

5/14/2013

Verifying Complex Clock and Reset Regimes in Modern Chips: The Challenge and Scalable Solutions

1/24/2011

Unleash the Power of Formal Technology for CDC Verification

7/13/2009

Using Formal Verification to Create Robust IP

7/30/2004

Formal Approach Eases Multiple Clock Design

5/20/2004

Tutorials, White Papers, etc.

Intent-Driven Verification

EDA Tools

EnVision Ascent

Formal Verification

EnVision Conquest

Formal Verification

EnVision Meridian CDC Verification

Formal Verification

EnVision PureTime

Formal Verification

News

Integration of DeFacTo's SignOff and Real Intent's Meridian CDC Accelerates Sign-Off

5/14/2013

Real Intent Opens Central U.S. Sales and Support Office to Meet Growing Demand for its Advanced Verification Solutions

5/7/2013

Real Intent to Exhibit at CDNLive EMEA 2013

4/30/2013

Real Intent to Participate in ChipEx 2013

4/23/2013

Real Intent Signs Grand Technology as Distribution Partner for Taiwan

3/4/2013

Calypto Catapult Integrates with Real Intent Ascent Lint for Reliable RTL Implementation Flow

2/11/2013

Real Intent to Sponsor Design Verification Club Silicon Valley Event 2013 on Valentine's Day

2/7/2013

Real Intent Unveils Major Performance Enhancements in Ascent IIV and Ascent XV Tools for Early Functional Verification

1/30/2013

Real Intent Delivers Next Release of Meridian Constraints for Advanced Sign-Off of SOC Designs

1/28/2013

Real Intent Partners with TBS Technologies in Israel

1/14/2013

Real Intent Rolls Out New Version of Ascent Lint for Early Functional Verification

12/6/2012

Real Intent Partners with EuropeLaunch

8/20/2012

Real Intent Releases New Ascent Lint and Meridian CDC Verification Tools

5/29/2012

Real Intent Joins Cadence Connections Program

2/28/2012

Real Intent Improves Lint Coverage and Usability

2/15/2012

Real Intent Meridian 4.0 Offers Complete CDC Sign-Off for SOC Designs over 100 Million Gates

1/13/2012

Real Intent and Calypto Partner to Offer Integrated Tool Flow for RTL Power Optimization and Sign-Off

5/26/2011

SandForce Adopts Real Intent's Advanced Sign-off Verification Software for SSD Processors

5/5/2011

Real Intent Adds Significant New Design Productivity Features to Ascent Lint

2/22/2011

Real Intent Delivers Complete Constraint Management Solutions

11/18/2010

Real Intent Improves Electronic Design Quality with New DFT Software

5/19/2010

Real Intent Improves Its Fast, Low-Noise Electronic Design Linter

5/13/2010

Real Intent Releases Meridian CDC Version 3.0

3/4/2010

Real Intent Releases Ascent Lint Version 1.2 Offering New Rule Support with Low-Noise and High-Performance Linting

1/19/2010

Real Intent Helps Designers Prevent Faulty Circuits and Avoid Re-Spins

8/25/2009

Real Intent Announces New Functional Verification Solution to Ensure X-Robust Designs

7/20/2009

Real Intent Unveils New Releases of Ascent and Meridian

5/18/2009

Real Intent Announces "Real Verification News"

4/17/2009

Real Intent Partners with Satris in Israel

3/17/2009

Real Intent Announces 2-for-1 Appreciation Promotion for EDA Verification Software

2/12/2009

MoSys Picks Real Intent for IP Verification, Timing Closure

1/19/2009

Real Intent Introduces Meridian FPGA Clock Domain Crossing Verification Software for Altera Devices

11/5/2008

Real Intent Releases Speed3 (cubed) with Significant Productivity Enhancements

5/28/2008

Real Intent Ships Ascent 2.0 All-in-One Automatic Verification Software

3/24/2008

Real Intent Ships Next Generation of Ascent Automatic Verification Software

12/5/2007

Real Intent Announces EnVision TCV Timing Closure Verification Software

5/18/2007

Real Intent Announces Meridian Clock Domain Crossing Verification Software

4/16/2007

Real Intent Releases Next Generation Timing Exception Verifier

4/3/2007

QLogic Buys Real Intent PureTime Timing Exception Verifier

11/29/2006

Real Intent Broadens EnVision High-Performance Formal Verification Family

7/21/2006

Real Intent Releases Next Generation Clock Domain Verification Tool; Melds Simulation with Formal Analysis

2/22/2006

Real Intent Introduces Performance Breakthrough in Formal Verification, New Convergence Engine Adopted by SiCortex

12/20/2005

Real Intent Appoints CTC as Its Japanese Distributor

6/8/2005

Real Intent's Formal Assertion-Based Verification Selected by Micronas

6/7/2005

Real Intent Introduces PureTime Tool to Prove Timing Exception Accuracy

3/10/2005

Real Intent Raises $6.5M in Financing to Expand Formal Analysis Technology

2/11/2005

Real Intent's Formal Verification Software Licensed by Sun Microsystems

6/7/2004

NEC Picks Real Intent's Verix for Formal Assertion-Based Verification

5/28/2004

Real Intent's Formal Assertion-Based Verification Software Verifies ATI's Radeon Graphics Chips

5/21/2004


Go directly to Real Intent, Inc. for more company and product information.
Keywords: Real Intent, EDA, Design Debug (RTL), Formal Analysis (RTL), Synthesis (RTL), Verification (RTL),
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