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Maximizing the Value of Your Internal IP May 15, 2013 -- Everyone today understands the essential importance of third-party semiconductor intellectual property (IP) to the health of the semiconductor industry. Considerably less attention is given to the importance of a strong, serviceable portfolio of internal IP within a semiconductor company. We begin here to discuss what semiconductor companies should be doing to maximize the value of their internal IP. But first, we have to define some terms, because all IP is not created equal. In general, there are two types of IP: reusable and salvageable. ... read more Yes, Virginia, There Is a Stitch-and-Ship April 5, 2013 -- A recently published article warned about the dangers of the "stitch-and-ship" approach that some system-on-chip (SOC) teams employ. Discussed was argument that if all the individual IP blocks have been well-verified then only minimal verification is needed at the full-chip level. Typically, such verification teams taking this approach run basic connectivity checks, performed using formal analysis, and a small number of simulations to check basic SOC operation. There are multiple flaws with this approach, but the most fundamental is that it does not verify end-to-end application use cases that reflect how the SOC is used in the final product. ... read more Formal Verification Works Well for Connectivity Checking March 15, 2013 -- Connectivity checking — the verification of device wiring mdash; is among the many unheralded, yet essential, tasks in ASIC design. In a nutshell, it's making sure that the connections between blocks of logic are correct. This is not a trivial undertaking as such connections can easily number in the thousands. ... read more Formal Verification and Validation March 14, 2013 -- I got my first demo of a formal verification tool in the spring of 1992. It was given by Paul Menchini of VHDL and other IEEE standards fame. No one could accuse Paul of not understanding the theory or not being familiar with CAE tools. Yet, the demo showed how difficult it would have been to use the product. This was not something peculiar to the particular tool. The early formal verification programs were difficult to use and had almost nothing to do with hardware design. Even a highly respected "language lawyer" like Paul found navigating within the formal rules challenging. ... read more Verified Beyond Doubt March 14, 2013 -- What design team doesn't have the desire – make that goal – to have a chip that works as intended and taped out in just one spin? Come on. Let's be honest: They all do! Well then, let's focus on the methodology and tools to meet that goal. ... read more Click here for all SOCcentral Feature Articles
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