Page loading . . .
Using Code-Coverage Analysis to Verify 2D Graphic Engines in Automotive Apps
7/20/2012
Software Extends Hardware-in-the-Loop Real-Time Simulation
6/25/2012
Functional Safety Implementations in Modern MCUs
3/22/2012
AUTOSAR Timing Models Minimize ECU Risks
2/27/2012
Programmable Logic, SOCs Simplify Power Steering, Accessory Control
1/31/2012
Leverage Ethernet to Improve Passenger Safety, Comfort and Convenience
1/19/2012
Define Drain-Current Conditions when Calculating Power for Multicore SOCs
1/5/2012
Processors Enable Global Software Defined Radio Platforms
12/12/2011
Integrated MCUs Simplify Hybrid, EV Motor Control
9/22/2011
EMI Scans Verify Chip Design and Accelerate Time-to-Market
8/11/2011
Simulation Techniques Test Automotive Cluster Display ECUs
7/14/2011
Plan Strategies for Adopting Model-Based Design for Embedded Applications: Part 4 - Implementation, Verification and Validation
4/21/2011
Wirelaid Technology Enables High-Current, Fine-Pitch SMDs
4/19/2011
Plan Strategies for Adopting Model-Based Design for Embedded Applications: Part 3 - Migration Plan Requirements and the Design Phase
3/23/2011
Plan Strategies for Adopting Model-Based Design for Embedded Applications: Part 2 - Strategy for Change
3/3/2011
Plan Strategies for Adopting Model-Based Design for Embedded Applications: Part 1 - Challenges and Impact
2/24/2011
FMEA Eases Automotive ASIC Design and Deployment
12/22/2010
Dual-Core Architectures In Automotive SoCs
8/23/2010
Using FPGAs in Reliable Automotive System Design
1/15/2009
Need a Watchdog for Improved System Fault Tolerance?
10/22/2008
Virtual Prototyping Boosts Model-Driven Design for Six Sigma methodology, Part 2 of 3: Process Integration Keys Quality
4/17/2008
Virtual Prototyping Boosts Model-Driven "Design for Six Sigma" Methodology, Part 1 of 3: The Challenges and Tools
4/9/2008
Applying FPGAs in System-Critical Automotive Electronics
12/12/2007
DSPs Take on Next Generation Automotive Audio Processing
2/15/2006
Subscribe to SOCcentral'sSOC ExplorerNewsletterand receive news, article, whitepaper, and product updates bi-weekly.
Exec Viewpoint
Maximizing the Value of Your Internal IP
Warren SavageCEO, IPextreme
Yes, Virginia,There Is aStitch-and-Ship
Dave JohnsonVP of SalesBreker Verification
Lets' Go Onwith the Show!
Mike DonlinThe Write Solution Odd Parity Archive
Barbara's Bytes
So, Just What Is ESL
Barbara TuckSenior Editor,SOCcentral
SOC Design ASIC Design ASIC Verification FPGA Design CPLD Design PCB Design DSP Design RTOS Development Digital Design
Analog Design Mixed-Signal Design DFT DFM IC Packaging VHDL Verilog SystemC SystemVerilog
About SOCcentral.com
Sponsorship/Advertising Information