April 12, 2012 -- The need for embedded multiple time programmable (MTP) non-volatile memory (NVM) IP in advanced process nodes is rapidly increasing as designers integrate more features and functionality into their system-on-chip (SOC) designs. SOC designers need to understand the available IP technology on 65- and 40-nm processes so they can choose optimized and reliable solutions for their applications.
This webinar will focus on three main topics:
Review the key applications and use models that drive the need for embedded MTP NVM IP in advanced process nodes.
Discuss the capabilities and limitations of technologies used to implement embedded MTP NVM IP in advanced process nodes.
Understand how Synopsys aligns the application and market needs to provide embedded MTP NVM IP at advanced nodes with optimized, targeted technology capabilities.
Go directly to the EE Times Education & Training webcast site to view this presentation. Registration may be required.
Keywords: ASICs, ASIC design, embedded system design, embedded systems, embedded memory, IP, intellectual property, cores, nonvolatile memory, non-volatile memory, NVM, Synopsys, EE Times Education & Training
336/38245 4/12/2012 518 83
Designer's Mall
0.015625
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