July 19, 2012 -- Enterprise storage and multimedia SOCs implement designs with large amounts of memory. Having used embedded DRAM in earlier geometries, designers of these SOCs are now looking for alternatives at 28nm. One of Synopsys' unique memory products at 28nm is the ultra high-density 16Mb single-port SRAM, which allows the SOC designer to embed large monolithic memory blocks on chip.
This webinar focuses on:
How combining innovative power management schemes with TSMC certified bitcells delivers a compelling alternative to embedded DRAM
Ways to improve system performance when dealing with spatially disparate accesses in large memory
Go directly to the EE Times Education & Training webcast site to view this presentation. Registration may be required.
Keywords: ASICs, ASIC design, IP, intellectual property, cores, embedded memory, SRAM, DRAM, Synopsys, EE Times Education & Training
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Designer's Mall
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