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Basic Principles of Signal Integrity
Digital designs have not traditionally suffered by issues associated with transmission line effects. At lower frequencies the signals remain within data characterization and the system performs as designed. But as system speeds increase, the higher frequency impact on the system means that not only the digital properties, but also the analog effects within the system must be considered. These problems are likely to come to the forefront with increasing data rates for both I/O interfaces and memory interfaces, but particulalry with the high-speed transciever technology being embedded into FPGAs.
Transmission line effects can have a significant effect on the data being sent. At low speeds, the frequency response has little influence on the signal, unless the transmission medium is particularly long. However, as speed increases, high-frequency effects take over and even the shortest lines can suffer from problems such as ringing, crosstalk, reflections, and ground bounce, seriously hampering the integrity (response) of the signal. You can overcome these issues by following good design techniques and simple layout guidelines, as described in this document.
Read the entire article on the Altera Corp. website.
Speeding-up Signal Integrity Analysis and Repair for SoCs
The last thing you want after detailed routing is to spend a lot of time finding and fixing signal integrity (SI) problems. You can minimize SI issues with good prevention techniques in design planning, but you also need an efficient back-end sub-flow for detecting and fixing the problems. As part of this sub-flow, you need the ability to perform incremental what-if modeling of fixes in static timing analysis (STA) to take advantage of an STA tool's fast run times. Sometimes you can also save time by making fixes manually.
These techniques can help minimize the number of iterations through the SI analysis/repair sub-flow. No matter how well integrated these steps are, the full sub-flow is required to ensure that SI problems are fixed. However, incremental what-if modeling of fixes (whether automatic or manual) in STA can save a great deal of time by showing that a fix will probably work. This article focuses on such analysis and repair techniques that help shorten this critical process.
Read the entire Synopsys, Inc. article on SOCcentral.
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Tutorials, White Papers and Application Notess on Signal Integrity |
| A Design Methodology for the I/O Power Supply of Next Generation Packaging Sigrity, Inc. |
| A Simulation Study of Simultaneous Switching Noise Sigrity, Inc. |
| A Unified Approach of PM Noise Cancellation in Large RF Multitone Autonomous Circuits Mentor Graphics Corp. |
| Achieving 3.2 Gb/s, 400 MTS AGTL+ IO Through Robust Power DeliveryDesign with Minimal Package Size Sigrity, Inc. |
| Basic Principles of Signal Integrity Altera Corp. |
| Beyond DDR: Signal Integrity and Timing Analysis of Quad Band Memory (QBM) Systems Signal Integrity Software, Inc. (SiSoft) |
| Closing the Nanometer Yield Chasm Cadence Design Systems, Inc. |
| Design Integrity Issues Affecting Mixed-Signal Designs Mentor Graphics Corp. |
| Design Techniques for High-speed Source Synchronous Buses Signal Integrity Software, Inc. (SiSoft) |
| Distributed Models for Multi-Terminal Capacitors – Using 2D Lossy Transmission-Line Approach Sigrity, Inc. |
| Effective Decoupling Radius of Decoupling Capacitor Sigrity, Inc. |
| Effects of 20-H Rule and Shielding Vias on Electromagnetic Radiation from Printed Circuit Boards Sigrity, Inc. |
| Effects of Power and Ground Via Distribution on the Power and Ground Performance of C4/BGA Packages Sigrity, Inc. |
| Efficient Signal and Power Integrity Analysis Using Parallel Techniques Sigrity, Inc. |
| EMI Reduction and PCB Layout Techniques TLSI, Inc. |
| Extraction of Equivalent Circuit Models of Package Power Supply Distribution Systems from Full Wave EM Field Simulations Sigrity, Inc. |
| Frequency Dependencies of Power Noise Sigrity, Inc. |
| High Speed DDR Performance in 4 vs 6 Layer FCBGA Package Design Sigrity, Inc. |
| High-Speed Design Challenges for a 1.4GHz Network Processor Signal Integrity Software, Inc. (SiSoft) |
| High-Speed I/O Design Considerations in Low-Cost Packaging Applications Toshiba America Electronic Components, Inc. (TAEC) |
| Impact of High Impedance Mid-Frequency Noise on Power Delivery Sigrity, Inc. |
| Integrated Modeling Methodology for Core and I/O Power Delivery Sigrity, Inc. |
| Managing Signal Integrity in Nanometer Digital Designs Cadence Design Systems, Inc. |
| Measured and Simulated Signal Propagation Behaviour on High Speed Nets ofLarge, Highly Dense and Complex PCBs Sigrity, Inc. |
| Measurement and Simulation of Simultaneous Switching Noise in the Multi-Reference Plane Package Sigrity, Inc. |
| Mid-Frequency Delta-I Noise Analysis of Complex Computer System Boards with Multiprocessor Modules and Verification by Measurements Sigrity, Inc. |
| Modeling of the Electrical Performance of the Power and Ground Supply for a PC Microprocessor on a Card Sigrity, Inc. |
| Nanometer Sign-off: From Design to Manufacturing Cadence Design Systems, Inc. |
| Noise Considerations in Circuits and Systems Mentor Graphics Corp. |
| Package and Chip Design Optimization for Mid-Frequency Power DistributionDecoupling Sigrity, Inc. |
| Power Delivery System Performance Optimization of a Printed Circuit Boardwith Multiple Microprocessors Sigrity, Inc. |
| Receiver Characterization using Periodic Small-Signal Analysis Cadence Design Systems, Inc. |
| Signal Integrity Sigrity, Inc. |
| Signal Integrity and Clock System Design Integrated Device Technology, Inc. (IDT) |
| Signal Integrity Closure Cadence Design Systems, Inc. |
| Signal Integrity Comparisons Between Stratix II and Virtex-4 FPGAs Altera Corp. |
| Signal Integrity Sign-off Verification Magma Design Automation, Inc. |
| Signal Integrity Tutorial Reference Designer |
| Simulation Study of Power Delivery Performance on Flip-Chip Substrate Technologies Sigrity, Inc. |
| Simultaneous Switching Noise and Signal Integrity Actel Corp. |
| System-Level I/O Power Modeling Sigrity, Inc. |
| Via and Return Path Discontinuity Impact on High Speed Digital Signal Quality Sigrity, Inc. |
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