April 11, 2012 -- This webinar concludes a two-part series on frequency synthesis, with an introduction to direct digital synthesis. We give a basic review of how a direct digital synthesis system works, touching on the inner workings of the DDS engine at a relatively high level. We also discuss the trade-offs between PLL and DDS technology as a base choice for frequency synthesis needs.
Go directly to the EE Times Education & Training webcast site to view this presentation. Registration may be required.
Keywords: embedded system design, embedded systems, DSP, digital signal processing, digital signal processors, direct digital synthesis, phase-locked loops, PLLs, Analog Devices, Inc. (ADI), EE Times Education & Training
336/37982 4/11/2012 1092 157
Subscribe to SOCcentral's SOC Explorer Newsletter and receive news, article, whitepaper, and product updates bi-weekly.