September 19, 2012 -- Embedded memories are the most-dense components within a system-on-chip (SOC), accounting for more than 50% of the chip area. Designed using aggressive design rules, embedded memories tend to be more prone to manufacturing defects and field reliability problems than any other core on the chip. This webinar discusses a number of advanced embedded memory test solution capabilities. These includ hierarchical implementation and validation, fault detection in very-deep-submicron technologies, repair at the manufacturing level, diagnosis for process improvement and field repair and error-correction (ECC) capabilities that address today's design yield and reliability needs.
What you will learn:
The technical trends and challenges associated with embedded test, repair and diagnostics in today's designs.
The trade-offs and design impact of various solutions.
How Synopsys' DesignWare STAR Memory System can meet your embedded test, repair and diagnostics needs.
Go directly to the EE Times Education & Training webcast site to view this presentation. Registration may be required.
Keywords: ASICs, ASIC design, IP, intellectual property, cores, EDA, EDA tools, electronic design automation, verification, memory testing, Synopsys DesignWare STAR Memory System, EE Times Education & Training
336/39038 9/19/2012 731 193
Designer's Mall
1.586914E-02
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