March 23, 2004 -- Manhattan Routing Inc. (MRI) today announced that its Physical Window design visualization environment enabled ChipWrights Inc., a fabless semiconductor company, to meet timing specifications and significantly reduce the tapeout schedule for a 0.18-micron image processing DSP chip. Physical Window is a design visualization environment for chip implementation front-end teams that offers a cost-effective solution for accelerated design management. PW is designed to merge the physical details of the layout data and the timing reports from sign-off tools such as Synopsys' PrimeTime and Cadence's Pearl.

The high-performance 200MHz ASIC design had 1.5 million logic gates and was manufactured on a 6-metal-layer, 0.18-micron process technology. The design contained a significant number of high-speed data paths from logic to memory, making almost all timing on the chip critical in order to meet performance. Physical Window allowed the logic designers to explore the physical implementation of the datapath and guide the implementation team to an effective original floorplan that would meet both density and timing requirements.

ChipWrights outsources the physical implementation of its designs, investing in state-of-the-art logic design tools but not in expensive physical design tools such as layout and place & route that typically include some visualization features. Before using Physical Window, the company faxed drawings and made costly on-site visits to its outsourcing vendor to gain needed insight from the physical design team.

When ChipWrights' front-end logic design team set out to floorplan the power grid, macros and hierarchical logic modules, they needed to first inspect and analyze the placement and routing of the physical implementation. This time, they turned to Physical Window for the solution.

"Physical Window gave us tremendous 'bang for the buck,'" said Mike Goldman, director of engineering at ChipWrights. "It was a cost-effective method for communicating with our vendor's physical implementation team. Without Physical Window, we would have had to either be on-site at the vendor every time we needed to view the layout, or else purchase expensive layout tools to do it in-house."

Using Physical Window, ChipWrights was also able to meet the chip's target timing performance specification. The company also shaved time off the physical design schedule by identifying poor placement of several timing-critical hierarchical modules early in the design process. "Due to the promptness and quality of MRI's technical support, not only did we uncover design issues and increase the chip's performance, but also we didn't lose valuable schedule time by waiting for the resolution of tool issues," added Goldman.