| Ubicom Selects Denali's Verification IP Products for Chip Development Efforts |
December 14, 2004 -- Denali Software today announced that Ubicom, Inc., a provider of communications processor and software platforms, has selected Denali's verification intellectual property (IP) products for its chip design and verification ef ... read more |
| Virage Logic's Embedded Non-Volatile Memory Qualified on Tower Semiconductor's 180nm CMOS Logic Process |
December 13, 2004 -- Tower Semiconductor and Virage Logic Corp. have announced the availability of Virage Logic's patented Nonvolatile Electrically Alterable (NOVeA) embedded memories for production on Tower Semiconductor's 180nm CMOS logic pro ... read more |
| Actel ProASIC Plus FPGAs Chosen By Monterey Bay Aquarium Research Institute for Low-Power, High-Reliability Operation |
December 13, 2004 -- Actel Corp. flash-based FPGAs were chosen by the Monterey Bay Aquarium Research Institute (MBARI) for use in its advanced underwater seismograph. The MBARI seismographs are located on the floor of Monterey Bay, where they us ... read more |
| Altera's First FPGA Lab in India Opens at the Indian Institute of Science |
December 13, 2004 -- Altera Corp. has established its first FPGA/ system-on-a-programmable-chip (SOPC) university development laboratory in India at the Indian Institute of Science in Bangalore. The Indian Institute of Science will use the lab t ... read more |
| Atmel and Thales Navigation Sign Technology Agreement to Build Advanced, Affordable, GPS Chipsets |
December 13, 2004 -- Atmel Corp. and Thales Navigation have signed a technology agreement under which the two companies will partner in the development and marketing of state-of-the-art global positioning system (GPS) chipsets, sub-systems and a ... read more |
| Celoxica Introduces PixelStreams Platform for Streaming Video Processing Featured |
December 13, 2004 -- Celoxica, Inc. has announced the addition of algorithm IP and a block-based graphical design entry platform to its portfolio of electronic system level (ESL) design tools. The PixelStreams development environment provides a ... read more |
| NEC Implements 90nm Vector Supercomputer Chipset with Cadence Encounter |
December 13, 2004 -- Cadence Design Systems, Inc. today announced that NEC Corp. used the Cadence Encounter digital IC design platform to develop the complete 90nm chipset for one of the world's fastest vector supercomputers.
With Encoun ... read more |
| Toshiba Chooses Forte's Behavioral Synthesis for Next-generation Design Flow |
December 13, 2004 -- Forte Design Systems today announced that Toshiba Corp. has chosen Forte's Cynthesizer SystemC behavioral synthesis product for use in its SystemC design flow. The companies have entered a multi-year agreement to deploy Cynt ... read more |
| Synopsys Galaxy Design Platform Enables First-Pass Silicon Success of Winbond's Latest MPEG-4 Multimedia Chips |
December 13, 2004 -- Synopsys, Inc. today announced that Winbond Corp. has achieved first-pass silicon success using Synopsys' Galaxy Design Platform for its latest 130nm, MPEG-4 multimedia chips. The Galaxy platform includes a highly correlated ... read more |
| Toshiba Supports Cadence Encounter RTL Compiler for ASIC Design Flow |
December 13, 2004 -- Cadence Design Systems, Inc. today announced that Toshiba America Electronic Components, Inc. (TAEC) has introduced a design kit to support its Custom system-on-chip and ASIC customers using Cadence Encounter RTL Compiler sy ... read more |
| Aldec Releases Active-HDL Actel Edition |
December 13, 2004 -- Aldec, Inc. has announced the release of Active-HDL 6.3, Actel edition. The new version provides push button integration to Actel's Designer series place-and-route software. When combined with a third-party synthesis tool, ... read more |
| Awards Presented at FSA's Tenth Anniversary Celebration |
December 13, 2004 -- The Fabless Semiconductor Association (FSA) announces the winners for its 2004 awards, presented at the tenth annual FSA Awards Dinner Celebration on Thursday, December 9, 2004 in Santa Clara, Calif. This program celebrates ... read more |
| Cradle Multiprocessor DSP Chip Enables Jaxstream’s Standard-Definition Version MPEG4 Encoder |
December 13, 2004 – Cradle Technologies, Inc. and Jaxstream today announced that Jaxstream’s standard definition encoder has been ported to the Cradle CT3400 Multiprocessor DSP (MDSP). The Jaxstream MPEG4 encoder incorporates an integrated multi ... read more |
| National Semiconductor Adds Active Filter Designer and Precision Amplifiers to WEBENCH Online Design Environment |
December 13, 2004 -- National Semiconductor Corp. has announced its WEBENCH Active Filter Designer online design tool to speed the creation of sophisticated filters for data acquisition and signal conditioning applications. The tool lets engine ... read more |
| Xilinx Enables Instant Deployment of Aurora Serial Connectivity Protocol |
December 9, 2004 -- Xilinx, Inc. has announced the availability of FPGA-based Version 2.2 reference design cores for the high-speed serial I/O protocol Aurora. Specifically geared for Xilinx Virtex-II Pro X programmable solutions, the Aurora 2.2 ... read more |
| Beach Solutions Jumpstarts SPIRIT 1.0 Compliance With EASI IP Developer Package Featured |
December 8, 2004 -- Beach Solutions, a founding member of the SPIRIT Consortium, has launched the EASI IP Developer Package, a SPIRIT 1.0 compliant IP capture tool, which lets IP developers package their IP blocks based on the industry-defined ... read more |
| Mentor Graphics Announces Platform Express Product Support for the new SPIRIT 1.0 Specification |
December 8, 2004 -- Mentor Graphics Corp.'s Platform Express product, the company's XML-based rapid system-on-chip (SoC) design creation tool, now supports the SPIRIT 1.0 specification for intellectual property (IP) design re-use. Released today ... read more |
| Xilinx Delivers CPRI-Compliant Reference Design |
December 8, 2004 -- Xilinx, Inc. has announced immediate availability of its CPRI (Common Public Radio Interface) Reference Design. The complete reference design provides designers with a digitized and serial internal base station interface for ... read more |
| Mentor Graphics Joins Serial ATA International Organization |
December 8, 2004 --Mentor Graphics Corp. has joined the Serial ATA International Organization (SATA-IO), a non-profit organization dedicated to sustaining the quality, integrity and dissemination of the SATA technology by maintaining the specif ... read more |
| Mixed-Signal/RF PDK Checklist Promotes Quality Standards |
December 8, 2004 – The Fabless Semiconductor Association (FSA) announced today that its Mixed-Signal/RF PDK Checklist, released in March 2004, has been adopted as standard practice into top-tier foundry PDK development workflows and delivered wi ... read more |
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