June 29, 2006 -- Synopsys, Inc. today announced that Sunplus Technology Co. Ltd. has taped out a large high-density consumer design with Synopsys' IC Compiler next-generation physical implementation solution. Sunplus chose Synopsys design consultants and the IC Compiler tool to complete the entire physical layout of this design within 30 days to meet Sunplus' market opportunity. The challenge faced by the design team was to achieve the chip's performance target while not exceeding the tight die-size constraint. By achieving a utilization of close to 90%, IC Compiler minimized the die size and significantly lowered the chip cost.

"For this kind of consumer design, unit cost and time-to-market are absolutely critical," said George Chou, Director in the Design Methodology Service Division of Sunplus. "The combination of Synopsys' next-generation physical implementation technology and expert design services allowed us to maximize productivity while meeting both our performance and time-to-results goals."