July 10, 2006 -- Chartered Semiconductor Manufacturing, Ltd. and A*STAR's Institute of Microelectronics (IME) have entered into a research collaboration to optimize a range of fine-pitch packaging technologies for copper metallization and low-k dielectric silicon processes at 65nm and below. The research is based on the 65-nm processes developed by Chartered and its joint development partners, IBM, Infineon Technologies and Samsung Electronics Co. In addition to enabling more choices, the Chartered-IME collaboration means designers could potentially benefit from silicon-proven solutions and modeling tools to characterize the impact of fine-pitch package on silicon early in the design development cycle, which should improve manufacturability and back-end-of the-line yield performance.
"Our collaboration with IME is aimed at developing industry solutions that give the semiconductor industry a silicon-proven fine-pitch packaging solution," said Dr. Liang-Choo "LC" Hsia, Senior Vice President of Technology Development at Chartered. "With the transition to 65nm, companies are realizing that having a successful backend packaging strategy is a key to realizing volume ramp quickly and meeting time-to-market goals."
To meet technically demanding requirements, the research will utilize a large die, copper/low-k test chip structure that has a fine bump pitch. The work will investigate the package-level reliability and optimize the performance against various fine-pitch packaging technologies. These include high-lead solder bump, copper posts and polymer encapsulation. In addition, modeling tools will be built to capture the correlation between the fine-pitch packaging technologies and test structure stress levels, integrity and performance. Using the modeling results, the impact of under-bump metallurgy on low-k integrity and the compatibility of underfill materials with low-k structures will also be evaluated and characterized.
The Institute of Microelectronics (IME) is a member of Singapore's Agency for Science, Technology and Research (A*STAR). Positioned to bridge the R&D between academia and industry, IME's mission is to increase value-add to the electronics industry in Singapore by engaging in relevant R&D in strategic fields of microelectronics; supporting and partnering the electronics industry; and developing skilled R&D personnel. Its key research areas are in integrated circuits and systems; semiconductor process technologies and microsystems, modules and components.
IME is playing a leadership role in the advancement of semiconductor technology. It started its research on packaging copper/low-k devices in 1999 and has launched three industry consortia to address the various research challenges. In the Wafer Technology Consortium launched in 2002 with 10 participating companies, the research team demonstrated for the first time a reliable flip chip package for copper/ultra-low-k devices. The leading research effort also delivered new concepts for flip chip packaging solution which meet all industrial level reliability tests.
Go to the Chartered Semiconductor Manufacturing, Ltd. website to find additional information.