September 8, 2006 -- Toshiba America Electronic Components, Inc. (TAEC) today announced that Toshiba Corporation (Toshiba) has developed a new 8-bit microcontroller (MCU) core. Designated TLCS-870/C1, the new core is capable of processing one instruction cycle in a single clock cycle, enabling faster processing at lower frequencies, reduced noise and lower power consumption compared with Toshiba’s previous 8-bit core. Its large-capacity address space is expandable to 128 kBytes. The flexible TLCS-870/C1 core is well suited for a wide range of applications from small-scale applications, such as portable digital-consumer products, to large-scale applications requiring large-capacity ROM, such as air conditioners, washing machines, and other white goods.
The core architecture was modified from the previous TLCS-870/C architecture to achieve the fast processing of one instruction cycle in a single clock cycle. The result was up to a four-fold increase in performance at the same clock frequency, compared with existing Toshiba 8-bit MCUs.
Part of the IC design used synchronous RTL design instead of multiphase-clock design based on circuit diagrams. The expanded address space was attained with a memory-management method that manages code and data in separate areas. Up to 128 kBytes of address space can be implemented in an 8-bit MCU without any adverse consequences such as increased footprint due to address-bus expansion or degraded processing speed, which is common with the alternative memory-bank method.
The TLCS-870/C1 core is binary compatible with previous Toshiba 8-bit MCUs so existing software resources can be used.
Go to the Toshiba America Electronic Components, Inc. (TAEC) website for details.