| Agilent Technologies Ships Electromagnetic Design System with Full 3D EM Simulation |
July 13, 2006 -- Agilent Technologies, Inc. has announced the availability of its Electromagnetic Design System (EMDS) for high-frequency RF and microwave circuit designers. Priced compatibly with typical circuit simulators, EMDS makes fu ... read more |
| Anova Solutions Tackles Process and Design Variations |
July 13, 2006 -- Anova Solutions, Inc. has created a new EDA tool suite to analyze process and design variations to maximize yield and performance in 65-nm and below designs. Working with Fujitsu, Ltd., the company has developed the Anova ... read more |
| Oki Reduces Custom LSI Layout Design Time with Pulsic Technology |
July 13, 2006 -- Pulsic, Ltd. and Oki Electric Industry Company, Ltd. today announced that Oki has adopted Pulsic's routing and full interactive editing technology to handle the demands of Oki's custom LSI layout designs such as Flat Pan ... read more |
| Azuro's PowerCentric Reduces Power on CSR Designs |
July 13, 2006 -- Azuro, Inc. today announced that CSR, plc, a provider of Bluetooth and WiFi technology, has successfully taped-out using Azuro's PowerCentric clock implementation solution. "Low power is a key driver for CSR," said James ... read more |
| Verific Teams with Concept Engineering |
July 13, 2006 -- Concept Engineering GmbH announced today that it usedf Verific Design Automation, Inc.'s hardware description level (HDL) Component Software as the register transfer level (RTL) front end for its newly launched RTL ... read more |
| TI Introduces the Rad-Hardened QMLV TLK2711 SerDes Device for Use in Ultrahigh-Speed Bidirectional Point-to-Point Data Transmission Systems |
July 13, 2006 -- Texas Instruments, Inc. (TI) has released the TLK2711HFGQMLV 1.6 to 2.7Gbps Serializer/Deserializer. A member of the WizardLink family of multigigabit transceivers, the device is qualified to MIL-PRF-38535 (QML) Class V a ... read more |
| DFM Parametric Yield Models for Memory IPs |
July 13, 2006 -- Legend Design Technology, Inc. has extended its CharFlo-Memory! toolset for the applications characterizing DFM parametric yield models of memory IPs in system-on-chip (SOC) designs. The proactive DFM (design-for-manufa ... read more |
| Semiconductor and IP Industry Leaders Join Synopsys and Si2 to Advance Liberty Modeling Standard |
July 13, 2006 -- Synopsys, Inc. today announced that ARM, Infineon Technologies, Sequence Design, Semiconductor Technology Academic Research Center (STARC), STMicroelectronics, Sun Microsystems, Synopsys, Texas Instruments, and Virage Log ... read more |
| Zuken Announces Free Footprint Download for Altera's MAX II CPLD Packages |
July 13, 2006 -- Zuken, Ltd. today announced the availability of free footprint downloads for Altera's new MAX II CPLD FineLine BGA (FBGA) and Micro FineLine BGA (MBGA) packages. The new MAX II CPLD packages meet the small form factor p ... read more |
| CoFluent Design Expands Sales in the US and Israel |
July 13, 2006 -- Leveraging on a recent deal with a world-leading US semiconductor company, CoFluent Design took the first steps to establish a direct presence in the US market. The company signed an agreement with EDA Sales, Inc. to more ... read more |
| Rio Design Automation's RioMagic and Magma's New Talus Achieve Higher Level of Interoperability |
July 13, 2006 -- Rio Design Automation, Inc.'s RioMagic package-aware chip design software has been integrated with Magma Design Automation, Inc.'s Talus IC implementation product, extending Talus' RTL-to-GDSII capabilities to incl ... read more |
| Azul Systems Deploys Denali Memory Solutions in Second-Generation Compute Appliances |
July 12, 2006 -- Denali Software, Inc. today announced that Azul Systems, Inc. has successfully implemented Denali's Databahn DDR2 memory controller in its new Vega 2 processor chip. Designed by Azul and fabricated by TSMC in an a ... read more |
| Mentor Graphics Integrates the Newly Acquired ADiT Fast-Spice Technology with ADVance MS |
July 12, 2006 -- Mentor Graphics Corp. has completed integration of the newly acquired fast-Spice simulation technology with Mentor's leading-edge mixed-signal simulation platform, ADVance MS (ADMS). Offering much higher simulation throug ... read more |
| Oki Standardizes on the Cadence Incisive Formal Verifier |
July 12, 2006 -- Cadence Design Systems, Inc. today announced that Oki Electric Industry Co., Ltd. has standardized on Incisive Formal Verifier for formal assertion-based verification (ABV). Oki has realized improvements in product delive ... read more |
| Mentor Graphics Redefines DFM Handoff with Calibre nmDRC, Part of New Calibre nm Platform |
July 12, 2006 -- Mentor Graphics Corp. has announced the immediate availability of the Calibre nmDRC tool, which redefines the traditional design rule checking (DRC) step by integrating critical elements such as critical area analysis and ... read more |
| Actel’s Enhanced Libero IDE Offers “Smart” Functionality for Fusion Mixed-signal FPGAS |
July 12, 2006 -- Actel Corp. has introduced the latest version of the Actel Libero Integrated Design Environment (IDE) with new features intended to increase the flexibility, efficiency and performance of designs based on the company’s f ... read more |
| Sandwork Announces Newest Product in Analysis, Verification and Debugging (AVAD) Suite |
July 12, 2006 -- Sandwork Design, Inc. has released SpiceCheck, the latest product in the company's AVAD suite for analog and mixed-signal designers. SpiceCheck performs netlist debugging from syntax verification to circuit-aware static c ... read more |
| Altera Expands Into Portable Market with Lower Cost, Lower Power MAX II CPLDs |
July 12, 2006 -- Altera Corp. has expanded the MAX II device family to address the growing portable applications market. With new ultra-small packages, a new power-down capability and lower cost, MAX II devices offer designers of handheld ... read more |
| Cadence Extends Test and Yield Diagnostics Capabilites |
July 12, 2006 -- Cadence Design Systems, Inc. is extending its test and yield capabilities with new compression and yield diagnostics. The new release of Cadence Encounter Test addresses the escalating cost of manufacturing high quality ... read more |
| Aprio and Pyxis Technology Collaborate on Lithography-Aware DFM Router |
July 12, 2006 -- Aprio Technologies, Inc. and Pyxis Technology, Inc. have integrated Aprio's newly announced Halo-Quest and associated DFM View into the DFM-routing technology from Pyxis. This collaboration allows for a dramatic r ... read more |
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