Page loading . . .

  
 Category: News: News Archive 2006: Monday, May 20, 2013
Sort Entries by    
Use the input form on the right to search on a word or phrase.  
Page(s): 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 (2505 Entries)
Cadence Encounter Global Synthesis Supported by STMicroelectronics for Its ASIC Customers 

April 25, 2006 -- Cadence Design Systems, Inc. today announced that STMicroelectronics will provide support for Cadence Encounter RTL Compiler synthesis in its ASIC design methodology and flow on 90- and 65-nm processes for its int ... read more

Vitesse's Low Cost Stackable Layer-2 Gigabit Ethernet Smart Switch Eliminates Need for Fast Ethernet Stackable Products 

April 25, 2006 -- Vitesse Semiconductor Corp. has announced the E-StaX-34 switch-on-a chip product, a low cost stackable Layer 2 Gigabit Ethernet (GbE) Smart Switch designed to bring affordable Gigabit Ethernet to entry level application ... read more

AMI Semiconductor Adopts InCyte Chip Estimation System 

April 25, 2006 -- Giga Scale IC, Inc. announced today that AMI Semiconductor (AMIS) has adopted the InCyte system to perform early chip design estimations for its advanced digital product lines. Giga Scale IC's InCyte enables ... read more

Virtex-4 PMC Expansion Card Accelerates Signal Processing Algorithms 

April 24, 2006 -- 4DSP, Inc. has released the FM480, a new PCI Mezzanine Card (PMC) based on the latest Virtex- 4 FPGA technology from Xilinx. The FM480 field trials have shown exceptional performances and robustness. The first applicatio ... read more

TI MCUs Address Emerging Requirements of Complex, Embedded Applications 

April 25, 2006 -- Texas Instruments, Inc. (TI) is now sampling the new MSP430FG461x series of ultra-low power MCUs with up to 120kBytes flash memory, and has announced the volume availability of the TMS470R1B1M ARM7-based MCUs with 1MByte ... read more

Mentor Graphics Verifies Clock-Domain Crossing Solution for Sun Microsystems UltraSPARC T1 Processor 

April 25, 2006 -- Mentor Graphics Corp. today announced its 0-In Clock-Domain Crossing (CDC) technology was used in the design of Sun Microsystems' UltraSPARC T1 processor, which Sun recently announced. The UltraSPARC T1 processor with pa ... read more

Magma's IC Implementation Flow for Wireless Designs Selected by Skyworks 

April 25, 2006 -- Magma Design Automation, Inc. today announced that Skyworks Solutions, Inc. has utilized Magma's netlist-to-GDSII IC-design solution for its next-generation baseband cellular handset solution with multimedia featu ... read more

True Circuits PLLs Selected by Icera 

April 25, 2006 -- True Circuits, Inc., a leading provider of analog and mixed-signal intellectual property (IP), today announced that multiple instances of its Phase-Locked Loop (PLL) hard macros have been used by fabless semiconductor co ... read more

Synopsys Qualifies Automotive Industry Standard VHDL-AMS Models for Use with Saber Simulator 

April 25, 2006 -- Synopsys, Inc. has qualified the VHDL-AMS models available through the FAT-AK30 working group of the German automotive organization Verband der Automobilindustrie (VDA)* to run in the Synopsys Saber simulator for use by ... read more

43rd Design Automation Conference Previews Technical Program Highlights  Featured

April 24, 2006 -- The Design Automation Conference (DAC) has announced program highlights for the 43rd DAC, to be held July 24-28, 2006, at the Moscone Center in San Francisco. This year's technical program was selected from the record nu ... read more

NVIDIA Adopts Synopsys' Design Compiler Topographical Technology 

April 24, 2006 -- Synopsys, Inc. today announced that NVIDIA Corp. is deploying the "topographical technology" in Synopsys' Design Compiler Ultra to increase the competitiveness and accelerate time-to-market for its next-generation design ... read more

Actel Receives DSCC SMD Numbers 

April 24,2006 -- Actel Corp. today announced that the Defense Supplier Center Columbus (DSCC) has released Standard Microcircuit Drawing (SMD) numbers for Actel's high-reliability, radiation-tolerant RTAX2000S, RTAX1000S and RTAX250S devi ... read more

Lattice Adds Programmable Power Supply Trimming IC to Power Manager II Product Family 

April 24, 2006 -- Lattice Semiconductor Corp. has announced the ispPAC-POWR6AT6 device, the latest addition to its Power Manager II product family. The ispPAC-POWR6AT6 device provides margining, selectable output levels and voltage monito ... read more

Actel ProASIC3 FPGAs Selected for Miniature USB-Based Test and Measurement Equipment 

April 24, 2006 -- Actel Corp. today announced that its single-chip, flash-based ProASIC3 FPGAs have been selected for use within the USBscope50, part of Elan Digital Systems' portfolio of miniature USB-based test and measurement equipment ... read more

Celoxica Unveils FPGA Acceleration Solution for AMD Opteron Processor-Based Systems 

April 24, 2006 -- Celoxica, Ltd. and DRC Computer Corp. have announced the availability of a computing workstation that couples the AMD Opteron processor with a dynamically reconfigurable co-processor module manufactured by DRC and ... read more

Gradient Launches CircuitFire 3D Temperature Analysis for Analog/Mixed-Signal IC Designs 

April 24, 2006 -- Throughout the analog/mixed-signal IC design flow - from early design exploration to final sign-off - chip architects, circuit designers, and layout designers are feeling more pressure from the need for an accurate understandin ... read more

HyperTransport Consortium Maintains Interconnect Performance Leadership with New 3.0 Specification 

April 24, 2006 -- The HyperTransport Consortium has released version 3.0 of the HyperTransport specification. The new standard nearly doubles the bandwidth and speed of the previous HyperTransport 2.0 specification. In addition, HyperTran ... read more

Denali Announces Simulation Models for Spansion's MirrorBit ORNAND Flash Memory Products 

April 24, 2006 -- Denali Software, Inc. has announced the availability of simulation models for Spansion's MirrorBit ORNAND Flash memory products. Developed by Denali in cooperation with Spansion, the new simulation models enable s ... read more

Lattice Semiconductor Delivers Enhanced ispLEVER 6.0 Design Tools 

April 24, 2006 -- Lattice Semiconductor Corp. has announced the immediate availability of its ispLEVER 6.0 programmable logic design tool suite. Fully supporting the newest 90-nm LatticeECP2 and LatticeSC FPGA families, ispLEVER 6.0 boa ... read more

Magma's Quartz DRC Qualified on TSMC 90-nm and 65-nm Processes 

April 24, 2006 -- Magma Design Automation, Inc. today announced that Quartz DRC has been qualified for designs targeted to TSMC's (Taiwan Semiconductor Manufacturing Company) 90- and 65-nm processes. Quartz DRC is architected to verify an ... read more




 Search for:
            Site       Current Category  
   Search Options

Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Exec Viewpoint

Maximizing the Value of Your Internal IP


Warren Savage
CEO, IPextreme

Exec Viewpoint

Yes, Virginia,
There Is a
Stitch-and-Ship


Dave Johnson
VP of Sales
Breker Verification

Odd Parity

Lets' Go On
with the Show!


Mike Donlin
The Write Solution

Odd Parity Archive

Barbara's Bytes

So, Just What
Is ESL


Barbara Tuck
Senior Editor,
SOCcentral

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
CPLD Design
PCB Design
DSP Design
RTOS Development
Digital Design

Analog Design
Mixed-Signal Design
DFT
DFM
IC Packaging
VHDL
Verilog
SystemC
SystemVerilog

Special Topics/Feature Articles
3D Integrated Circuits
Analog & Mixed-Signal Design
Design for Manufacturing
Design for Test
DSP in ASICs & FPGAs
ESL Design
Floorplanning & Layout
Formal Verification/OVM/UVM/VMM
Logic & Physical Synthesis
Low-Power Design
MEMS
On-Chip Interconnect
Selecting & Integrating IP
Signal Integrity
SystemC
SystemVerilog
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Verilog
VHDL
 
Design Center
Whitepapers & App Notes
Live and Archived Webcasts
Newsletters


About SOCcentral.com

Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About SOCcentral.com
Copyright 2003-2013  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
183.552  4.687988