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 Category: Magazine & Journal Articles Online: Article Archive 2005: Thursday, May 23, 2013
What Platform ASICs Are and When to Use Them   
Publication: eeDesign (EE Times EDA News)
Contributor: LSI Corp.
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January 10, 2005 -- Although system designers in need of custom logic solutions are increasingly faced with new technical challenges, they are armed with new advancements and choices in custom silicon offerings. One of those options is the choice between cell-based ASIC and platform ASIC solutions.

Both are viable paths for implementing complex and high-performance systems on a chip. Determining which solution best fits the application often mixes technical and business considerations. Technical considerations include system performance, logic, and IP (intellectual property) integration requirements. Business concerns typically address product market window, projected volumes, design cost, resources, and risk analysis.

In general, if an application requirement is at the higher end in terms of logic integration (above 5 million ASIC gates), in terms of performance (beyond 300 MHz system performance), and it absolutely has to reach the lowest possible unit cost due to high volume projections, it probably is more suitable for a cell-based ASIC implementation. On the other hand, if time to market and risk mitigation are driving factors, logic integration requirements are around 0.5 million to 5 million gates, and a low barrier of entry outweighs the need for absolute lowest unit cost, then platform ASIC implementation is often the right choice.

By Yousef Khalilollahi. (Khalilollahi is RapidChip Product Marketing Director for LSI Logic Corp.)


This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the eeDesign (EE Times EDA News) website.

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Keywords: eeDesign, LSI Logic, structured ASICs, platform ASICs,
563/11014 1/10/2005 7996 1280


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