| The Truth About Design for Manufacturing by Electronic Design Magazine |
September 29, 2005 -- A search for what exactly constitutes "DFM" turns up some interesting results. Having looked high and low for the spirit if not the letter of the law of true design for manufacturing, I can only conclude that it's a devel ... read more |
| Learn To Manage All Kinds of Complexity with SystemC by Electronic Design Magazine |
September 29, 2005 -- SystemC came about because of the need to model systems-on-a-chip (SoCs). SoCs require concurrent modeling of hardware and software, increasing complexity to a level that could not be managed any other way. Today’s use of ... read more |
| Enhance Your Signal Processing Toolbox with Complex Notation by Dorr Engineering Services, Inc. in EE Times Embedded |
September 27, 2005 -- As the speed of DSP's and digital hardware keeps increasing, software and digital hardware are replacing traditional analog hardware, making today's gizmos and gadgets smarter, more reliable, less expensive, and more powe ... read more |
| Low-power PLDs: A Good Choice for Portable Designs by Xilinx, Inc. in EE Times Programmable Logic Designline |
September 26, 2005 -- Today, anyone currently designing portable equipment is concerned with power, cost, and package size. These concerns usually rule out traditional silicon solutions employed by telecom, datacom and server engineers, since ... read more |
| Making the Case for Live at Power-Up by Actel Corp. in EE Times Programmable Logic Designline |
September 21, 2005 -- As systems become more complex, the pressure to reduce cost and shorten design cycles are the main drivers for higher system efficiency, modularity, and simplicity. When a certain feature is required in an application, de ... read more |
| The History and Future of Scan Design by Synopsys, Inc. in eeDesign (EE Times EDA News) |
September 19, 2005 -- For more than four decades, scan technology
has somehow eluded the radar screen of the IC test industry. As test continues
to evolve and make significant newsworthy changes, scan has maintained a
relatively quiet — ... read more |
| Thermal Integrity: A Must for Low-Power IC Digital Design by EDN Magazine |
| September 15, 2005 -- Over the last three years, IC-power management
has moved from a third-order to a first-order concern for chip designers,
especially those designing ASICs and SOCs (systems on chips) for portable-system
applications. Ex ... read more |
| One Design Fits All by EDN Magazine |
September 15, 2005 -- Although board designers have for years used FPGAs (field programmable gate arrays) to interconnect system components, the latest high-density devices are powerful enough to also replace the processors, memory, custom log ... read more |
| In Search of Cool Computing by Sun Microsystems, Inc. in EDN Magazine |
September 15, 2005 -- The biggest challenge facing SOC (system-on-chip) designers today is how to deliver higher performance and minimize IC power and the attendant heat. Power and cooling needs are pushing the limits of available technology a ... read more |
| Extensions to the IEEE 1149.1 Boundary-Scan Standard by JTAG Technologies, Inc. in EDN Magazine |
September 15, 2005 -- The IEEE 1149.1 boundary-scan standard was
developed almost 15 years ago to resolve the problems associated with limited
physical access for probing test points on pc boards and to verify that device
pins have been ... read more |
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