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 Category: News: News Archive 2007: Tuesday, May 21, 2013
Xilinx Virtex-5 System Monitor Capability Provides FPGA Analog Debug and System Management Solution  
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March 13, 2007 -- Xilinx, Inc. has announced immediate availability of the System Monitor feature on all its Virtex-5 platform FPGAs. Already on-board all Xilinx Virtex-5 devices, the solution provides designers with an analog debug and system management tool for thermal management and measurement of on-chip power supply voltages. The System Monitor wizard is available with the latest ISE 9.1i IP Update I.

Designed by the Xilinx Dublin-based IC design team, System Monitor is a sophisticated capability specifically created to address the challenges of increased on-chip power density that has accompanied increasing levels of FPGA integration and performance. It facilitates easy access to key information during development and after deployment to help designers overcome these challenges to ensure performance and reliability.

System Monitor is built around a fully specified 10-bit 200-kSPS general purpose analog-to-digital converter (ADC). Automatic calibration and self check features ensure accurate and reliable measurements over a temperature range of -40°:C to +125°C. The ADC is used to digitize the outputs of on-chip analog sensors and can also be used to monitor up to 17 external analog inputs for the purpose of checking environmental aspects of the system performance. The System Monitor feature is fully functional on power up and requires no design effort. The complete solution is supported by Xilinx development software.

Additional benefits of the System Monitor capability include a programmable channel sequencer, measurement data averaging and the ability to set user defined alarm thresholds for on-chip sensors. System Monitor can also be configured to initiate a chip level power down if necessary. The capability will remain fully functional during power down, thus ensuring continuous monitoring, and can also initiate power-up under user-defined temperature conditions.

Pricing and Availability

System Monitor is a feature available at no additional charge on all Virtex-5 FPGAs. Tool support is provided to all ISE software users and beginning with ISE 9.1i IP Update I, an architectural wizard lets users easily integrate the capability. Users of the ChipScope Pro tool can use the System Monitor capability during system debug.

Go to the Xilinx, Inc. website for details.

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Keywords: Xilinx, Virtex-5 platform FPGAs, debug, EDA tools,
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