Page loading . . .

  
 Category: News: News Archive 2007: Monday, May 20, 2013
Sort Entries by    
Use the input form on the right to search on a word or phrase.  
Page(s): 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 (2326 Entries)
ANADIGICS Introduces New Integrated 1GHz RF Amplifier to Enhance Tuner Performance in Cable Boxes and TVs 

May 21, 2007 -- ANADIGICS, Inc. has announced the availability of the ABA3130, a single-chip, low-noise, high linearity RF amplifier with integrated gain control. This device is the latest addition to ANADIGICS' portfolio of RF products f ... read more

Magma and PDF Solutions to Debut Chip Yield Simulation Solution 

May 21, 2007 -- Magma Design Automation, Inc. and PDF Solutions, Inc. have collaborated to deliver Quartz Yield, powered by pDfx SignOff, a new yield simulator that enables accurate and systematic yield improvement and decreases pr ... read more

Broadcom Licenses ARM Cortex-M3 Processor for Next-Generation Wireless Applications 

May 21, 2007 -- ARM today announced that Broadcom Corp. has licensed its ARM Cortex-M3 processor to integrate into next-generation wireless and networking solutions. This multiple-use licensing agreement will assist in the development of ... read more

Silicon Navigator Announces New Engines for the RDE Framework, Extends EDA Component Offerings for CAD Developers 

May 21, 2007 -- Silicon Navigator, Inc. is announcing three new software engines for its RDE Framework: SKILL-compatible PCell Editor, RTL Power Analysis and Schematic Editor. The engines augment RDE's existing engines for RTL processing ... read more

Denali and LeCroy Demonstrate Industry-Leading PCIe 2.0 Solutions 

May 21, 2007 -- Denali Software, Inc. and LeCroy Corp., a leading supplier of oscilloscopes and serial protocol analyzers, have announced the availability of a comprehensive solution, including PureSpec PCIe verification IP and Databahn P ... read more

Genesys Testware Adds Graphical User Interface to Embedded Test Tool 

May 21, 2007 -- Genesys Testware, Inc. has announced the addition of a graphical user interface (GUI) to its embedded test tool ChiptestMaker . ChiptestMaker automates the process of verifying and inserting test structures into an IC desi ... read more

Jasper Electronics Leverages Actel Fusion Reference Platform to Rapidly Deploy MicroTCA Power Module 

May 21, 2007 -- Actel Corp. today announced that Jasper Electronics has developed a MicroTCA power supply, the TCA380, using Actel's MicroTCA Power Module (PM) reference platform. Based on the Actel Fusion Programmable System Chip (PSC), ... read more

STARC to Develop Low-Power Pride Reference Flow Using Common Power Format 

May 21, 2007 -- Cadence Design Systems, Inc. today announced that Japan's Semiconductor Technology Academic Research Center (STARC) has selected Si2's Common Power Format (CPF) in the development of STARC's low-power Pride referenc ... read more

Sigrity Solution for Multi-Domain I/O Planning Delivers Unified Data Model for Real-time Evaluation 

May 21, 2007 -- Sigrity, Inc. has, today unveiled OrbitIO Planner to enable dynamic I/O planning across the multiple domains of IC, package, and printed circuit board. According to Sigrity, this is the first single tool to provide both a ... read more

OneSpin Solutions Establishes Operations in Japan 

May 21, 2007 -- Addressing growing customer demand in Japan for its formal verification solutions, OneSpin Solutions GmbH has expanded its global operations with a new sales and field applications engineering office in Yokohama, Japan, kn ... read more

Atmel Launches Customizable Microcontroller-based SOC Platform 

May 21, 2007 -- Atmel Corp. has announced the CAP microcontroller-based system-on-chip (SOC) platform featuring high-speed local memory, a wide range of industry-standard peripherals and interfaces, and a high-capacity metal programmable (MP) bl ... read more

Magma Extends and Expands Quartz DRC and Quartz LVS Capabilities 

May 21, 2007 -- Magma Design Automation, Inc. has announced significant enhancements to Quartz DRC and Quartz LVS that result from the company's accelerated product development efforts. "For the past 12 months we focused on developing sig ... read more

Broadcom Announces Octal PHY that Extends Ethernet Reach to 500 Meters on CAT 5 and Telephone Grade Cables 

May 21, 2007 -- Broadcom Corp. has announced an eight-port octal physical layer (PHY) device that extends the reach of Ethernet over twisted pair cables. The new 65-nm CMOS octal PHY provides added flexibility to standard Ethernet cables ... read more

CoFluent Design Announces Version 2.1 of CoFluent Studio 

May 21, 2007 -- CoFluent Design has announced that the coming-up version 2.1 of its flagship product CoFluent Studio would be available for preview at the 44th Design Automation Conference in San Diego, California, from June 4 to 8. CoFlu ... read more

CLK Design Automation Boosts Timing Analysis Performance 10-100X with Amber Analyzer 

May 21, 2007 -- CLK Design Automation, Inc. has introduced the Amber Analyzer, which the company says is the first true threaded and incremental static timing and signal integrity (SI) analysis solution. The company's patent-pending archi ... read more

Atheros Expands 802.11n Portfolio with Second-Generation XSPAN Solutions 

May 21, 2007 -- Atheros Communications, Inc. has launched its second-generation XSPAN draft 2.0 802.11n product line. The new AR9001 family of chipset solutions builds upon the company's first-generation XSPAN products, with enhanced perf ... read more

Legend Design Memory IP Characterization for 45-nm Technology and Below 

May 21, 2007 -- Legend Design Technology, Inc.'s CharFlo-Memory!, an automatic memory characterization tool suite, has been upgraded with new capabilities for designs of 45nm and below. The new release addresses the power gating, data ret ... read more

Carbon Joins MIPS Alliance Program 

May 18, 2007 -- Carbon Design Systems, Inc. has joined the MIPS Alliance Program (MAP), adding MIPS Technologies to its growing number of strategic partners. Carbon also announced that it has integrated its models with the MIPSsim instruc ... read more

Casio Adopts Synopsys Design Compiler Topographical Technology to Reduce Time-to-Market 

May 18, 2007 -- Synopsys, Inc. today announced that Casio Computer Co., Ltd. has adopted Synopsys' Design Compiler topographical technology to shorten the design schedule for its next-generation EXILIM digital camera chips. Design Compile ... read more

Real Intent Announces EnVision TCV Timing Closure Verification Software 

May 18, 2007 -- Real Intent, Inc. has announced EnVision TCV, a complete software solution for timing closure verification (TCV). EnVision TCV includes Meridian for clock domain crossing (CDC) verification and PureTime for timing exceptio ... read more




 Search for:
            Site       Current Category  
   Search Options

Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Exec Viewpoint

Maximizing the Value of Your Internal IP


Warren Savage
CEO, IPextreme

Exec Viewpoint

Yes, Virginia,
There Is a
Stitch-and-Ship


Dave Johnson
VP of Sales
Breker Verification

Odd Parity

Lets' Go On
with the Show!


Mike Donlin
The Write Solution

Odd Parity Archive

Barbara's Bytes

So, Just What
Is ESL


Barbara Tuck
Senior Editor,
SOCcentral

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
CPLD Design
PCB Design
DSP Design
RTOS Development
Digital Design

Analog Design
Mixed-Signal Design
DFT
DFM
IC Packaging
VHDL
Verilog
SystemC
SystemVerilog

Special Topics/Feature Articles
3D Integrated Circuits
Analog & Mixed-Signal Design
Design for Manufacturing
Design for Test
DSP in ASICs & FPGAs
ESL Design
Floorplanning & Layout
Formal Verification/OVM/UVM/VMM
Logic & Physical Synthesis
Low-Power Design
MEMS
On-Chip Interconnect
Selecting & Integrating IP
Signal Integrity
SystemC
SystemVerilog
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Verilog
VHDL
 
Design Center
Whitepapers & App Notes
Live and Archived Webcasts
Newsletters


About SOCcentral.com

Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About SOCcentral.com
Copyright 2003-2013  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
183.571  4.296875