December 15, 2006 -- ESL design flows are for real. They're in use right now at some of the world's largest systems houses, and with those flows, chips are being taped out and put into production. So obviously, ESL flows can be made to work. But does this mean that everyone is happy with the state of the ESL art? In a word, no. ESL design, which comprises any tools, languages, models, or methodologies that operate at a level of abstraction higher than the register-transfer level (RTL), is slowly taking shape as users continue their ongoing shakeout of available resources. Standards organizations such as the Open SystemC Initiative and the SPIRIT Consortium, among others, are moving toward a set of standards related to intellectual-property (IP) integration.

Alas, ESL design still isn't for the faint of heart. For systems-on-a-chip (SoC) design teams, many bumps lay in the road between a high-level functional design description, a sheaf of IP-block datasheets, and a finished design that comes out of the fab on time and under budget.

ESL design flows and methodologies don't just appear out of thin air, but rather someone is responsible for putting them together and ironing out the wrinkles. In this report, the architects of ESL flows at six large systems houses will spill the beans about their methodologies. They'll discuss what works for them, where the holes exist in their flows, and what they'd like to see happen to make ESL really fly. Take heed, EDA vendors: Consider this an open letter from your ESL constituents.

By David Maliniak, Electronic Design Magazine Senior Editor