| FPGAs Balance Lower Power, Smaller Nodes Drip by Drip by EDN Magazine |
June 8, 2006 -- About eight years ago, just when FPGA vendors figured out how to increase the gate counts of their devices to rival those of ASICs, the market started demanding higher performance. It took the industry about four years to make ... read more |
| Implementing PCI Express Designs Using FPGAs by Xilinx, Inc. in EE Times Programmable Logic Designline |
June 7, 2006 -- As the industry transitions from shared, arbitrated, bus-based system interconnect architectures like PCI to high-performance, serial, point-to-point architectures like PCI Express, designers are looking for implementations tha ... read more |
| Facilitating System-in-Package (SiP) Design by Cadence Design Systems, Inc. in eeDesign (EE Times EDA News) |
June 5, 2006 -- In the latest move in the cost, density, and time-to-market battles, a number of wireless and consumer-focused IC and systems companies are turning to System-in-Package (SiP) design to gain a competitive advantage. Hemmed in, o ... read more |
| A Bridging Model for ESL Synthesis by Bluespec, Inc. in eeDesign (EE Times EDA News) |
May 29, 2006 -- SystemC has recently become popular for electronic system-level (ESL) modeling because of the growing complexity of systems on a chip (SoCs), and because of the ubiquity of C and C++. It facilitates the incorporation of embedde ... read more |
| Virtually Real: Hardware Acceleration and Parallel Processing Yield Realistic Gaming by Electronic Design Magazine |
May 25, 2006 -- Gaming has come a long way since the days of Pac-Man and Pong. The latest software is so realistic that players can almost feel the weight of a defensive tackle crashing down on them. The latest hardware accelerators let game d ... read more |
| Power Dissipation in High-End Integrated Communication Processors by Freescale Semiconductor, Inc. in EDN Magazine |
May 25, 2006 -- Traditionally, chip vendors' hardware specifications have provided typical and maximum core-power values at various frequencies. A common engineering practice has been to use the typical power number for thermal design and the ... read more |
| SystemVerilog Gains a Foothold in Verification by Electronic Design Magazine |
May 25, 2006 -- In its plain-vanilla form, the Verilog hardware description language is purely a designer's language that contains all of the constructs one would need to assemble an IC netlist for synthesis to gate level. But for today's extr ... read more |
| Consider Fast Ethernet for Your Industrial Applications by Micrel, Inc. in Electronic Design Magazine |
May 25, 2006 -- With the increasing desire and necessity to deploy the Internet everywhere, the need for Industrial Ethernet is on the rise. RS-232 and RS-485 data transmission no longer satisfy industrial customers. Rather, these customers de ... read more |
| Digital Power Lures System Architects, Power-Supply Vendors by EDN Magazine |
May 25, 2006 -- In the past year, digital power has been a hot topic for system architects, power-supply designers, and mixed-signal-IC vendors. Nay-sayers argue that digital power is needlessly expensive and complex — a solution in search of ... read more |
| How Assertions Can Be Used for Design by Poseidon Design Systems, Inc. in eeDesign (EE Times EDA News) |
May 22, 2006 -- There has been a lot of talk in the industry about the usefulness of assertions as part of a complete verification methodology. But there is something bigger going on here that many vendors are missing - the value that properties ... read more |
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