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 Category: News: News Archive 2008: Sunday, May 19, 2013
Lattice Announces ispLEVER 7.0 Service Pack 2 FPGA Design Tool Suite  
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January 29, 2008 -- Lattice Semiconductor Corp. has announced the immediate availability of Service Pack 2 for Version 7.0 of its ispLEVER FPGA design tool suite. The release adds additional usability and accuracy enhancements to the Power Calculator, new versions of Synplicity’s Synplify synthesis and Mentor Graphics’ Precision RTL synthesis, and new support for the LatticeMico32 embedded open source microprocessor.

This latest release of the LatticeMico32 adds support for multiple bus arbitration schemes, lets VHDL users implement the LatticeMico32 in their designs and adds Linux OS-based development tools. The Mico System Builder automatically generates the appropriate Wishbone Bus arbitration scheme when the microprocessor platform is generated for shared-bus or slave-side arbitration to allow multiple master ports access to multiple slave ports.

About the LatticeMico32 embedded microprocessor

The LatticeMico32 is a 32-bit soft microprocessor optimized for Lattice FPGAs. Lattice has released the Hardware Description Language (HDL) code of the microprocessor core and various peripheral components generated by the LatticeMico32 System, along with selected tools, in an open source format that provides visibility, flexibility and portability. The heart of the product is the LatticeMico32 System development tool suite, which provides a fast and easy way to implement microprocessor designs from platform definition to software development and debug. This flexible microprocessor finds application in a wide variety of markets including communications, consumer, computing, medical, industrial and automotive.

About the Lattice ispLEVER design tool suite

The ispLEVER design tool suite is the flagship design environment for the latest Lattice FPGA products. It provides a complete set of tools for all design tasks, including project management, IP integration, design planning, place and route, in-system logic analysis and more. ispLEVER is provided on CD-ROM and DVD for Windows, Unix or Linux platforms. ispLEVER Windows includes industry-leading third-party tools from Lattice partners Synplicity and Mentor Graphics for synthesis and simulation.

Pricing and Availability

Lattice’s Service Pack 2 for ispLEVER 7.0 for Windows, Linux and Unix users is available immediately without charge for customers with active design tool maintenance contracts. The full ispLEVER design tool suite starts at a price of $895 for the Windows version.

Go to the Lattice Semiconductor Corp. website to find additional information.

E-mail Lattice Semiconductor Corp. for more information.

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Lattice Semiconductor Corp.
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Keywords: Lattice Semiconductor, FPGAs, field programmable gate arrays, microprocessors, MPUs, IP, intellectual property, cores, design suites, EDA tools,
578/24852 1/29/2008 3522 197


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