May 7, 2008 -- Mentor Graphics Corp. has announced a partnership with NXP Semiconductors in which Mentorís design-for-test (DFT) products will be used by NXP Semiconductors to further improve the quality and time-to-market of NXPís solutions. The agreement provides NXP with Mentorís DFT solutions, including the TestKompress compressed pattern generation and the YieldAssist failure diagnosis tools. It also provides interim support for NXPís test tools.
ďNXP believes that a partnership with Mentor Graphics is the most effective way to continue to meet our manufacturing test needs and to deliver the highest quality devices,Ē said Renť Penning de Vries, Senior Vice President and Chief Technical Officer, NXP Semiconductors. ďFirst-time-right being a crucial element of the manufacturing and design process, NXP selected Mentorís technology for testing before tapeout and silicon to help improve our time-to-market. Mentor combines industry-leading design-for-test technology with a proven software development and support organization. Our partnership allows NXP to use commercial DFT tools without disrupting any of our critical design projects.Ē
Under the agreement, Mentor Graphics also obtains rights to NXPís internally-developed test tools, technology and talent as a portion of NXPís DFT tools development organization joins Mentorís Design-for-Test product division. This division of Mentor is also establishing a new R&D facility in Hamburg.