Page loading . . .

  
 Category: News: News Archive 2008: Thursday, May 23, 2013
Sort Entries by    
Use the input form on the right to search on a word or phrase.  
Page(s): 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 (1944 Entries)
Mentor Graphics Rejects Proposal from Cadence Design Systems  Featured

June 17, 2008 -- Mentor Graphics Corp. has acknowledged receipt of an unsolicited proposal by Cadence Design Systems, Inc. to acquire Mentor Graphics at a price of $16.00 per share. Mentor Graphics confirmed that it previously rejected th ... read more

IP Cores Offering AES and AES/GCM IP Cores for Actel FPGA Supporting FIPS-197, IEEE 802.1AE MACsec and P1619.1 Standards 

June 17, 2008 -- IP Cores, Inc. is shipping AES and AES/GCM IP cores supporting the FIPS-197, IEEE 802.1AE and P1619.1 standards. AES1 and GCM1 IP cores enable FPGA vendors to add encryption to their designs utilizing less than 15% of the ... read more

ETRI Selects Target as Tools Provider for Design of Next-Generation Multi-Core Media Processors 

June 16, 2008Target Compiler Technologies NV and Korea’s Electronics and Telecommunications Research Institute (ETRI) has announced that ETRI selected Target’s IP Designer tool-suite for the design and programming of next-generation d ... read more

Teklatech's FloorDirector Floorplanning EDA Tool Selected by Think Silicon 

June 16, 2008 -- Teklatech has announced that its FloorDirector product has been chosen by Think Silicon for use in 90-nm and 65-nm designs. Think Silicon selected the FloorDirector EDA tool for its floorplanning optimization technology a ... read more

Teklatech Joins Mentor Graphics' OpenDoor Partnership Program 

June 16, 2008 -- Teklatech,has joined Mentor Graphics Corp.’s OpenDoor program, promoting interoperability between the two companies’ solutions, including Teklatech’s recently-launched FloorDirector floorplanning tool.

"Tekla ... read more

Mentor Graphics Expands Nucleus Platform Solutions to Freescale i.MX31 Processor for Multimedia Applications 

June 16, 2008 -- Mentor Graphics Corp. has announced expansion of its platform solutions program by adding support for the Freescale i.MX31 Product Development Kit (PDK) platform based on the i.MX31 multimedia applications processor. ... read more

Sensata Technologies Adopts Target’s IP Designer for use in Next-Generation Automotive Products 

June 16, 2008 -- Target Compiler Technologies NV announced that Sensata Technologies has adopted its IP Designer tool-suite. IP Designer is being used by Sensata to design key IP parts of imaging solutions for automotive safety.

J ... read more

Aonix Begins Implementation of Java Multiprocessor Virtual Machine 

June 16, 2008 -- Aonix announced the beginning of implementation efforts to add symmetric multiprocessing (SMP) capability to its flagship product PERC Ultra. Dubbed PERC Ultra SMP, the product will address the added complexities inherent ... read more

IDT Extends Family of High-Performance Serial RapidIO Central Packet Switches for the Embedded Market 

June 16, 2008 -- Integrated Device Technology, Inc. (IDT) has announced a new member of the IDT family of central packet switches (CPS). The new device provides the opportunity for more bandwidth, productivity and performance than existi ... read more

Sound Design Adopts Target’s IP Designer Tool-Suite for Ultra-Low-Power Medical Devices 

June 16, 2008 -- Target Compiler Technologies NVand Sound Design Technologies, a leading designer and manufacturer of ultra-low power semiconductor solutions for hearing instruments, jointly announced that Sound Design has adopted Target’ ... read more

STMicroelectronics Introduces STM8S Microcontrollers 

June 13, 2008 -- STMicroelectronics has added new 8-bit MCUs using its next-generation STM8 core, by introducing the STM8S family specified for the industrial temperature range. The new MCUs combine the core's high speed, performance and ... read more

Imperas Announces Licensing, Distribution Relationship with Tensilica 

June 13, 2008 -- Tensilica, Inc. has signed a partnership agreement with Imperas to allow fast functional, instruction accurate models of its popular Xtensa and Diamond Standard processors to run on Open Virtual Platform (OVP) base ... read more

Faraday Announces Availability of 1-GHz Memory Compiler to Enable GHz CPU and SOC Designs in UMC 90nm 

June 13, 2008 -- Faraday Technology Corp. has announced the first commercially available 1-GHz memory compiler in UMC (United Microelectronics Corp.) 90-nm SP process. The single-port memory compiler utilizes advanced layout and circuit d ... read more

austriamicrosystems Expands Field-Programmable OTP Memory Portfolio for Its 0.35-µm Process Family 

June 13, 2008 -- austriamicrosystems AG’ Full Service Foundry business unit has announced a further expansion of its IP block portfolio with the launch of a complete set of for its 0.35-µm process family. Easy adjustment of analog a ... read more

AWR Microwave Office Design Environment 2008 Offers an Enhanced User Interface and More Than 100 Enhancements 

June 13, 2008 -- AWR has announced Version 2008 of its Microwave Office design environment. The release includes more than 100 enhancements and major changes to the user interface that increase its flexibility for the user. Features such ... read more

EEMBC Announces First Certified OABench 2.0 Text and Image Processing Benchmark Scores 

June 13, 2008 -- The Embedded Microprocessor Benchmark Consortium (EEMBC) has announced publication of the first certified benchmark scores obtained using OABench 2.0, EEMBC's next-generation benchmark tests that approximate the performan ... read more

TI's new 10-V, 16-bit SAR DACs Provide Simple Analog Interface to Processors 

June 13, 2008 -- Texas Instruments, Inc. has introduced a pair of ±10-V, 16-bit analog-to-digital converters (ADCs) with excellent measurement repeatability and high resolution. Both the ADS8519 and ADS8513 combine a low-power successive ... read more

ZiLOG's Enhanced Zatara ARM-Based ASSP Adds Integrated Security Features and On-Chip USB 

June 12, 2008 -- ZiLOG, Inc. has added a new product to its Zatara family of ARM core-based ASSPs for secure transactions. Offering the very latest PCI PED certification, the new product offers more design flexibility, and meets the needs ... read more

Mentor Graphics Provides Advanced Design For Manufacturing Capabilities in TSMC Reference Flow 9.0 

June 13, 2008 -- Mentor Graphics Corp.'s place-and-route, physical verification, design-for-manufacturing (DFM) and design-for-test (DFT) tools now can be accessed through TSMC's (Taiwan Semiconductor Manufacturing Company) Reference Flow ... read more

TSMC Reference Flow 9.0 Covers Apache's Advanced Leakage and System Jitter Analysis 

June 12, 2008 -- Apache Design Solutions, Inc. has announced that TSMC (Taiwan Semiconductor Manufacturing Company) Reference Flow 9.0 includes Apache’s advanced leakage and system-wide jitter analysis solutions for TSMC’s 40-nm process t ... read more




 Search for:
            Site       Current Category  
   Search Options

Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Exec Viewpoint

The Many Faces
of Low-Power Verification


Ghislain Kaiser
CEO, Docea Power

Exec Viewpoint

Maximizing the Value of Your Internal IP


Warren Savage
CEO, IPextreme

Odd Parity

Lets' Go On
with the Show!


Mike Donlin
The Write Solution

Odd Parity Archive

Barbara's Bytes

So, Just What
Is ESL


Barbara Tuck
Senior Editor,
SOCcentral

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
CPLD Design
PCB Design
DSP Design
RTOS Development
Digital Design

Analog Design
Mixed-Signal Design
DFT
DFM
IC Packaging
VHDL
Verilog
SystemC
SystemVerilog

Special Topics/Feature Articles
3D Integrated Circuits
Analog & Mixed-Signal Design
Design for Manufacturing
Design for Test
DSP in ASICs & FPGAs
ESL Design
Floorplanning & Layout
Formal Verification/OVM/UVM/VMM
Logic & Physical Synthesis
Low-Power Design
MEMS
On-Chip Interconnect
Selecting & Integrating IP
Signal Integrity
SystemC
SystemVerilog
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Verilog
VHDL
 
Design Center
Whitepapers & App Notes
Live and Archived Webcasts
Newsletters


About SOCcentral.com

Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About SOCcentral.com
Copyright 2003-2013  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
183.578  3.40625