| Synopsys Enters Embedded Memory Market with Highly Differentiated IP Featured |
March 6, 2008 -- Synopsys, Inc. and Novelics, Inc. today announced the expansion of Synopsys' DesignWare IP portfolio with the addition of an SRAM-1T embedded memory IP that is implemented in bulk logic CMOS technology, requiring n ... read more |
| Certess Functional Qualification Solution Broadly Adopted by STMicroelectronics |
March 6, 2008 -- Certess, Inc. today announced that STMicroelectronics has expanded, through a two-year commitment, its corporate wide adoption of Certitude. Certitude provides an objective measure of quality in the SOC verification envir ... read more |
| The MathWorks Introduces New Versions of MATLAB and Simulink Product Families |
March 5, 2008 -- The MathWorks, Inc. has introduced Release 2008a (R2008a) of its MATLAB and Simulink product families. R2008a is the latest update to the MathWorks product line, which includes new versions of MATLAB and Simulink, along w ... read more |
| intoPIX Announces a Real-Time JPEG 2000 4K Encoder |
March 5, 2008 -- intoPIX s.a. is xtending its activities into post production iwith its new 4K JPEG 2000 Encoder, the IPX-JP4K-E, along with its established IPX-JP4K-D Decoder as a complete JPEG 2000 2K and 4K compression and decompressio ... read more |
| Sidense Raises $6 Million in Venture Capital to Expand Global Reach |
March 5, 2008 -- Sidense Corp., a developer of semiconductor memory intellectual property (IP), announced today that it has raised $6 million in a venture capital financing round co-led by Vertex Venture Capital, a leading Israeli ventur ... read more |
| eASIC Integrates Front-End from Interra to Accelerate Deployment of Nextreme Structured ASICs |
March 4, 2008 -- Interra Systems, Inc. has announced integration of Concorde, a Verilog, VHDL and mixed language parser, elaborator and synthesis front-end into the eX and eWizard design tools for the eASIC Corp. Nextreme 90-nm fam ... read more |
| PrimeYield LCC Enables Litho-Clean Tapeout for LG Electronics HDTV Application Chipset |
March 4, 2008 -- Synopsys, Inc. today announced that LG Electronics has discovered and fixed lithography hotspots in its HDTV application chipset using Synopsys' PrimeYield LCC (lithography compliance checker). The HDTV application chipse ... read more |
| Silvus Technologies Announces Commercial Availability of 802.11n PHY IP Solution |
March 3, 2008 -- Silvus Technologies, Inc., a wireless design services provider and commercial supplier of semiconductor intellectual property (IP) solutions for complex wireless applications,has announced the commercial release of its 80 ... read more |
| Streaming Technology Fuses JTAG Emulation and Boundary Scan |
March 4, 2008 -- Goepel Electronic GmbH has launched a next-generation in-system emulation technology called VarioTAP. The solution is based on a flexibly configurable streaming technology of the TAP signals based on respective microproce ... read more |
| Tela Innovations Technology for Addressing Manufacturing and Lithography Challenges at 45nm And Beyond |
March 4, 2008 -- Tela Innovations, an early-stage technology company focused on addressing the challenges of scaling semiconductor manufacturing to 45nm and beyond, today unveiled its business strategy and technology vision for using on-g ... read more |
| BitWave Semiconductor and Open-Silicon Enter Into Strategic Partnership |
March 3, 2008 -- BitWave Semiconductor, Inc. has announced a strategic partnership with Open-Silicon, Inc. to bring BitWave's first product, the BW1102 Softransceiver RFIC, to high-volume production for the femtocell and cellular p ... read more |
| WiLinx Licenses Tensilica's Xtensa LX2 Processor Core for Low-Power UWB Chips |
March 4, 2008 -- Tensilica, Inc. today announced that WiLinx Corp., a fabless semiconductor company, has licensed the Xtensa LX2 configurable processor for its low-power True-UWB single-chip CMOS solutions. WiLinx True-UWB product ... read more |
| OCP-IP Unveils CoreCreator II Featured |
March 4, 2008 -- Open Core Protocol International Partnership (OCP-IP) today announced the availability of CoreCreatorII. CoreCreator II features verification IP and command-line based tools for validating Open Core Protocol (OCP) impleme ... read more |
| Xilinx Accelerates Development of SFI-5 Applications with Hardware-Verified Solutions |
March 4, 2008 -- Xilinx, Inc. has announced availability of a free hardware-verified reference design and third-party IP for the optical internetworking forum (OIF) SerDes framer interface level 5 (SFI-5) standard. The SFI-5 interface en ... read more |
| Magwel Acquires Kimotion to Strengthen Analog/RF Toolset, Secures Series A Funding |
March 4, 2008 -- Magwel NV, a provider of electronic 3D device-EM simulation and analysis tools, has announced the acquisition of Kimotion Technologies. Kimotion was founded in 2003 to develop software technology for modeling, opti ... read more |
| OCP-IP Announces Part 1 of Network-on-Chip Benchmarking Specification |
March 3, 2008 -- OCP International Partnership (OCP-IP) today announced that Part 1 of the Network-on-Chip (NoC) Benchmarking specification has entered member review. Part 1 of the specification details requirements and features for appli ... read more |
| Faraday and Mixel Announce IP Development and Licensing Partnership |
March 3, 2008 -- Mixel, Inc. today announced a Silicon Intellectual Property Partnership with Faraday Technology Corp. Mixel is licensing its high performance LVDS de-serializer transceiver IP to Faraday for use in its customer ASI ... read more |
| ASE Test Selects Verigy V93000 Port Scale RF for Complex RF-SOCs |
March 3, 2008 -- Verigy, Ltd. today announced that ASE Test, a large independent semiconductor testing company, has purchased the Verigy Port Scale RF solution for testing its customers’ highly integrated wireless communications devices. ASE Tes ... read more |
| Aldec Launches Verilog Design Rule Checker |
March 3, 2008 -- Aldec, Inc. today announced the world-wide release of ALINT, a stand-alone Verilog design rule checker that complies with the second edition of the STARC RTL Design Style Guide for Verilog HDL. Initially released in Japan ... read more |
| Nangate and Si2 Release Free 45-nm Open Source Digital Cell Library |
March 3, 2008 -- Nangate, Inc. today announced that it has donated an open source 45-nm standard-cell library to the Silicon Integration Initiative, Inc. (Si2). The library is based on the FreePDK45 process design kit (PDK) from N ... read more |
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