Page loading . . .

  
 Category: News: News Archive 2008: Saturday, May 25, 2013
Sort Entries by    
Use the input form on the right to search on a word or phrase.  
Page(s): 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 (1944 Entries)
Agilent Technologies' Large-Scale RFIC Design Software Performs Multiple Simulations from Single License 

January 25, 2008 -- Agilent Technologies, Inc. has announced the capability for multiple, parallel circuit simulations (Quad-Pack) from a single license in its GoldenGate RFIC simulation, analysis and verification software suite. The comp ... read more

ARM RealView Platform Baseboard for ARM1176JZF-S Processor 

January 25, 2008 -- ARM today announced the immediate availability of the RealView Platform Baseboard for the ARM1176JZF-STM processor. The Platform Baseboard for the ARM1176JZF-S processor features a development chip including the ARM117 ... read more

Mentor Graphics Releases Updated Serial ATA Host and Device Controllers for Storage Applications 

January 25, 2008 -- Mentor Graphics Corp. has announced immediate availability of updated Serial ATA (SATA) Host/Device intellectual property (IP) controllers with added support for the most commonly used features in the latest SATA speci ... read more

VIA Technologies Unveils Next-Generation Isaiah x86 Processor Architecture 

January 25, 2008 -- VIA Technologies, Inc. has announced details of the VIA Isaiah Architecture, a new x86 processor architecture that the company says will deliver significant boosts to the functionality and performance of desktop, mobil ... read more

Dongbu HiTek Drives Wafer Quality Management Development 

January 23, 2008 -- Dongbu HiTek today announced the successful integration of key quality-management tools to improve and expedite wafer quality management. By integrating Yield Management System (YMS) and Fault Detection & Classificatio ... read more

Silicon Line's 2.5-Gbps Optical Link Consuming Less than 10mW 

January 23, 2008 -- Silicon Line GmbH today announced the release of a 2.5-Gbps chipset comprising a transimpedance amplifier (TIA) with integrated limiting amplifier and a Vertical Cavity Surface Emitting Laser (VCSEL) driver. The comple ... read more

Elpida Standardizes on Simucad's SmartSpice Analog Circuit Simulator 

January 23, 2008 -- Simucad Design Automation, Inc. today announced that Elpida Memory, Inc. has standardized on SmartSpice for its analog simulation needs. SmartSpice provides the highest performance and simulation accuracy demand ... read more

ATopTech's Aprisa Cuts the Physical Design Time of Sharp's Multimillion-Gate System-on-Chip Design 

January 23, 2008 -- ATopTech, Inc. has announced that Sharp Corp. has used AtopTech’s Aprisa place-and-route family of physical design tools to complete the tape-out of a system-on-chip (SOC) for the consumer market. Using Aprisa enabled ... read more

Magma Introduces 3D Small-Area Analysis Option to Knights Camelot Failure Analysis Software 

January 23, 2008 -- Magma Design Automation, Inc. has introduced 3D Small-Area Analysis, an option to Magma's Knights Camelot CAD navigation failure analysis software that helps fab engineers locate potential circuit failures faster, acce ... read more

Mindspeed Introduces Next-Generation Family of Carrier Access VoIP Processors 

January 23, 2008 -- Mindspeed Technologies, Inc. today announced a new family of highly-integrated voice-over-IP (VoIP) processors designed to enable the migration of copper loop voice access networks from traditional Class 5 time-divisio ... read more

Altera Provides 50-Gbps SFI-5 Interface on Stratix II GX FPGAs 

January 23, 2008 -- Altera Corp. today announced SerDes Framer Interface Level 5 (SFI-5) standard support in its Stratix II GX FPGAs with embedded transceivers, providing a 40- to 50-Gbps interface for high-performance optical communicati ... read more

ARM Announces New RealView Trace Capture Unit 

January 22, 2008 -- ARM today announced the availability of the new RealView Trace 2 capture unit for use with the RealView ICE unit and new version 3.2 software release. This product combination introduces a streaming technology for maxi ... read more

NXP Unveils Ultra-Small, Single-Chip HSPA Multimedia Solution 

January 22, 2008 -- NXP Semiconductors today announced an ultra-small, single-core, dual-mode Nexperia Cellular Multimedia Baseband PNX6712 for HSPA and EDGE. Based on 65-nm process technology, it offers manufacturers advanced on-chip mul ... read more

AnalogicTech Announces 3-A Step-Down Converter for 12-V Industrial Applications 

January 22, 2008 -- Advanced Analogic Technologies, Inc. (AnalogicTech) today announced the AAT1160, a synchronous step-down DC/DC converter delivering up to 3-A output from a 12-V input. Combining high power efficiency levels and a very ... read more

Synopsys and Acceleware Deliver Hardware Accelerated Solution for Design of Optoelectronic Devices 

January 22, 2008 -- Acceleware Corp., a developer of high performance computing (HPC) applications, and Synopsys, Inc. have announced a new hardware solution that enables up to 20-times faster electromagnetic simulation of optoelectronic ... read more

Mentor Graphics Announces Catapult C Synthesis Accelerated Libraries for Xilinx Virtex-5 FPGAs 

January 22, 2008 -- Mentor Graphics Corp. today announced an extension to its ESL synthesis flow that lets users implement even higher performance DSP hardware than previously achievable with Catapult for Xilinx devices. The new Catapult ... read more

Altera Ships FPGA Featuring 340,000 Logic Elements  Featured

January 22, 2008 -- Altera Corp. has announced availability of the industry’s highest density FPGA. A member of Altera’s 65-nm Stratix III family, the EP3SL340 features 340,000 logic elements (LEs), supports DDR3 memory with interface spe ... read more

Tensilica Adds Support for High-Speed, Hardware-Based Processor Simulations Using Avnet's Xilinx Virtex-4 LX200 Development Kit 

January 22, 2008 -- Tensilica, Inc. has added support for Avnet’s Xilinx Virtex-4 LX200 Development Kit for high-speed hardware-based simulations of its Xtensa configurable and Diamond Standard processor families. Software developers can ... read more

Toshiba Collaborates with Cadence to Improve Analog and Mixed-Signal Design Reliability at 65nm and Below 

January 22, 2008 -- Cadence Design Systems, Inc. announced today that Toshiba Corp. has deployed Cadence Virtuoso simulation technology to provide its analog and mixed-signal chip designers an easy-to-use and accurate reliability analysis ... read more

OneSpin Solutions Complements 360 Module Verifier with Standard Assertion Language Support 

January 22, 2008 -- OneSpin Solutions GmbH today announced the addition of a standard assertion language link to its 360 Module Verifier solution. The link opens an additional gateway to complete, gap-free functional verification for com ... read more




 Search for:
            Site       Current Category  
   Search Options

Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Exec Viewpoint

The Many Faces
of Low-Power Verification


Ghislain Kaiser
CEO, Docea Power

Exec Viewpoint

Maximizing the Value of Your Internal IP


Warren Savage
CEO, IPextreme

Odd Parity

Lets' Go On
with the Show!


Mike Donlin
The Write Solution

Odd Parity Archive

Barbara's Bytes

So, Just What
Is ESL


Barbara Tuck
Senior Editor,
SOCcentral

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
CPLD Design
PCB Design
DSP Design
RTOS Development
Digital Design

Analog Design
Mixed-Signal Design
DFT
DFM
IC Packaging
VHDL
Verilog
SystemC
SystemVerilog

Special Topics/Feature Articles
3D Integrated Circuits
Analog & Mixed-Signal Design
Design for Manufacturing
Design for Test
DSP in ASICs & FPGAs
ESL Design
Floorplanning & Layout
Formal Verification/OVM/UVM/VMM
Logic & Physical Synthesis
Low-Power Design
MEMS
On-Chip Interconnect
Selecting & Integrating IP
Signal Integrity
SystemC
SystemVerilog
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Verilog
VHDL
 
Design Center
Whitepapers & App Notes
Live and Archived Webcasts
Newsletters


About SOCcentral.com

Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About SOCcentral.com
Copyright 2003-2013  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
183.578  3.5