Page loading . . .

  
 Category: News: News Archive 2008: Wednesday, June 19, 2013
Sort Entries by    
Use the input form on the right to search on a word or phrase.  
Page(s): 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 (1944 Entries)
Magma Introduces New Options for Knights Camelot CAD Navigation, Tightening Links Between Design and Manufacturing 

July 15, 2008 -- Magma Design Automation, Inc. has introduced significant enhancements to its Knights Camelot CAD navigation system, including an option making Camelot the first CAD navigation tool that enables failure analysis engineers ... read more

Magma Enhances Knights YieldManager with New Bitmap Defect Analysis 

July 15, 2008 -- Magma Design Automation, Inc. has introduced significant enhancements to Knights YieldManager, a customizable yield-management software system for semiconductor fab manufacturers worldwide. The enhancements enable fab yield, def ... read more

Magma Announces Next-Generation Knights LogicMap and IntensityMap 

July 15, 2008 -- Magma Design Automation, Inc. has announced next-generation versions of its Knights LogicMap and IntensityMap software that enable faster, more-accurate semiconductor device failure analysis and debug for logic devices. ... read more

Qualcomm and imec Collaborate on 3D Integration Research 

July 15, 2008 -- imec, Europe’s leading independent nanoelectronics research institute, and Qualcomm, Inc. have announced that Qualcomm is the first fabless integrated circuit company to participate in IMEC’s industrial affiliation ... read more

Shocking Connection Enables ESD Solution for PCB and IC Package Design 

July 15, 2008 -- Shocking Technologies, Inc. has joined the Cadence Connections program. Shocking Technologies and Cadence Design Systems, Inc. of San Jose, Calif. have agreed to work together to integrate Shocking’s VSD technology into C ... read more

Chips&Media Unveils Boda7503, High-Definition Video IP Solution Including AVS 

July 14, 2008 -- Chips&Media, Inc. unveiled its new Boda7503 video decode core supports HD(1080p) multi-standard format including Chinese Audio Video Standard (AVS).

AVS was approved as a Chinese national standard in March 2006 and ... read more

Cadence Expands System-Level Offerings with C-to-Silicon Compiler  Featured

July 14, 2008 -- Cadence Design Systems, Inc. today introduced Cadence C-to-Silicon Compiler, a high-level synthesis product that the company claims improves designer productivity up to 10 times in creating and re-using system-on-chip IP. ... read more

Virage Logic Expands Memory Interface Portfolio with New DDR3 Solution Supporting Speeds Up to 1.6Gbps 

July 14, 2008 -- Virage Logic Corp. today announced the broadening of its Intelli DDR memory interface product portfolio with the introduction of Intelli DDR3, a high-performance memory interface solution that supports speeds up to 1.6 Gb ... read more

KLA-Tencor Launches Computational Lithography Tool to Address Double-Patterning Challenges 

July 14, 2008 -- KLA-Tencor Corp. has introduced the latest version of its industry-leading computational lithography tool, Prolith 11. The new tool lets users evaluate current double-patterning schemes and cost-effectively explore alter ... read more

Envis Joins Si2's Low-Power Coalition 

July 14, 2008 -- The Silicon Integration Initiative, inc. (Si2) recently announced that Envis Corp. has joined Si2’s Low Power Coalition (LPC), an open industry group focused on advancing low-power design flow capability through op ... read more

Renesas Electronics Releases SuperH Family Microcontroller Featuring 200-MHz Operation and 2.5-Mbyte Flash Memory 

July 14, 2008 -- Renesas Electronics Corp. has announced the SH72544R SuperH 1 Family microcontroller designed for control of automotive engine and transmission systems. This microcontroller features high-speed operation of up to 200MHz a ... read more

eASIC Enables Nexus Chips to Reduce Power Consumption by 80% Over FPGAs 

July 14, 2008 -- eASIC Corp. announced that Nexus Chips, a leading Korean provider of graphics acceleration solutions, has leveraged eASIC’s Nextreme zero mask-charge ASIC in its latest 3D graphics acceleration system. By using Nextreme, ... read more

Cambridge Consultants XAP5 Core Sets New Standard for 16-Bit Processors 

July 14, 2008 -- Cambridge Consultants, Ltd. has launched its next-generation XAP processor core, the XAP5, offering wireless and sensor chip designers an advanced level of 16-bit processing performance combined with low energy consumptio ... read more

Calypto's Sequential Equivalence Checking Product Supports New Cadence C-to-Silicon Compiler 

July 14, 2008 -- Calypto Design Systems has unveiled a new version of its SLEC System-HLS (high-level synthesis) product that is fully integrated with Cadence Design Systems’ new C-to-Silicon Compiler high-level synthesis technology. < ... read more

Data I/O Introduces New ProLINE-RoadRunner XLF, Just-in-Time Programming for Automotive Applications 

July 11, 2008 -- Data I/O Corp. has expanded its family of just-in-time programming solutions with the announcement of an all new in-line automated programming solution, the ProLINE-RoadRunner XLF.

"The ProLINE-RoadRunner was origin ... read more

Kawasaki Microelectronics Adds Multiple MIPS Technologies Processor Cores to ASIC IP Portfolio 

July 11, 2008 -- MIPS Technologies, Inc. announced that Kawasaki Microelectronics (K-micro) has licensed multiple MIPS cores for its ASIC IP portfolio. The synthesizable cores, including MIPS Technologies' highest-performance singl ... read more

Impinj Acquires Intel's UHF RFID Reader Chip Operation 

July 11, 2008 -- Impinj, Inc. has announced the acquisition of Intel Corp.'s RFID operation, a business created by Intel's New Business Initiatives (NBI) incubator and which developed the R1000 RFID reader chip. The acquisition of Intel a ... read more

Renesas Adopts Cadence Virtuoso Spectre Circuit Simulator with Turbo Technology 

July 11, 2008 -- Cadence Design Systems, Inc. announced that Renesas Electronics Corp. has adopted the new version of Cadence Virtuoso Spectre Circuit Simulator, with performance-boosting "turbo" technology, for its analog and mixed-signa ... read more

austriamicrosystems releases High-Voltage IO library offering 4KV ESD protection 

July 11,2008 -- austriamicrosystems AG today announced that its 0.35-micron H35 high-voltage CMOS process technology is now offering 4-kV ESD (electrostatic discharge) protection. The new silicon proven H35 periphery library guarantees a ... read more

Power Forward Initiative Adds Three Leading Japanese Design Services Companies 

July 11, 2008 -- The Power Forward Initiative (PFI) announced that three Japanese design services companies recently joined the initiative and are offering Common Power Format (CPF)-enabled low-power design capabilities to their design se ... read more




 Search for:
            Site       Current Category  
   Search Options


Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Exec Viewpoint

Reducing Power
by Raising the
Level of Abstraction


David Pursley
Director,
Product Marketing
Forte Design Systems

Exec Viewpoint

The Many Faces
of Low-Power Verification


Ghislain Kaiser
CEO, Docea Power

Exec Viewpoint

Maximizing the Value of Your Internal IP


Warren Savage
CEO, IPextreme

Odd Parity

Summertime and the Livin' Ain't Easy


Mike Donlin
The Write Solution

Odd Parity Archive

Barbara's Bytes

So, Just What
Is ESL?


Barbara Tuck
Senior Editor,
SOCcentral

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
CPLD Design
PCB Design
DSP Design
RTOS Development
Digital Design

Analog Design
Mixed-Signal Design
DFT
DFM
IC Packaging
VHDL
Verilog
SystemC
SystemVerilog

Special Topics/Feature Articles
3D Integrated Circuits
Analog & Mixed-Signal Design
Design for Manufacturing
Design for Test
DSP in ASICs & FPGAs
ESL Design
Floorplanning & Layout
Formal Verification/OVM/UVM/VMM
Logic & Physical Synthesis
Low-Power Design
MEMS
On-Chip Interconnect
Selecting & Integrating IP
Signal Integrity
SystemC
SystemVerilog
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Verilog
VHDL
 
Design Center
Whitepapers & App Notes
Live and Archived Webcasts
Newsletters


About SOCcentral.com

Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About SOCcentral.com
Copyright 2003-2013  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
183.578  3.390625