January 24, 2007 -- This article presents practical techniques for incorporating "correctness by design" in DDR2 interfaces, from a signal integrity (SI) perspective, using the current generation of available design tools. Some common DDR2 design errors are analyzed, as well as the tradeoffs between some popular design alternatives.
By David Banas. (Banas is a senior staff applications engineer in the Advanced Products Division at Xilinx, Inc.)
This brief introduction has been excerpted from the original copyrighted article.